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| 型号： | ISL6322GIRZ |
| 厂商： | Intersil |
| 文件页数： | 10/39页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM BUCK 48-QFN |
| 标准包装： | 43 |
| 应用： | 控制器，Intel VR10、VR11、AMD CPU |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.38 V ~ 1.99 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 管件 |
| 产品目录页面： | 1248 (CN2011-ZH PDF) |
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ISL6322G
LGATE1 and LGATE2
These pins are used to control the lower MOSFETs. Connect
these pins to the corresponding lower MOSFETs’ gates.
EN_PH2
This pin is a digital logic input which tells the controller to
operate in single phase or 2-phase mode. The number of
active phases can be changed while the controller is
operating by changing the state of this pin. Tying this pin
high commands the part to operate in single phase mode
only. If EN_PH2 is tied low the part can operate in either
single phase or 2-phase mode depending on the state of
Bit 6 of I 2 C register 2. The default I 2 C setting is 2-phase
mode, so if Bit 6 of register 2 is not changed tieing EN_PH2
low commands the controller to operate in 2-phase mode.
If EN_PH2 is tied high the controller will ignore the state of
bit 6 in register 2 and will not allow the I 2 C interface to
control the number of channel’s firing.
SS/RST/A0
This pin has three different functions associated with it. The
first is that a resistor (R SS ), placed from this pin to ground, or
VCC, will set the soft-start ramp slope for the Intel DAC
modes of operation. Refer to Equations 15 and 16 for proper
resistor calculation.
The second function of this pin is that it selects which of the
two 8-bit Slave I 2 C addresses the controller will use.
Connecting the R SS resistor on this pin to ground will
choose slave address one(1000_110x), while connecting
PGOOD is pulled low. PGOOD is always low prior to the end
of soft-start.
NC
These are “no connect” pins. They should be left floating.
Operation
Multiphase Power Conversion
Microprocessor load current profiles have changed to the
point that using single-phase regulators is no longer a viable
solution. Designing a regulator that is cost-effective,
thermally sound, and efficient has become a challenge that
only multiphase converters can accomplish. The ISL6322G
controller helps simplify implementation by integrating vital
functions and requiring minimal external components. The
“Block Diagram” on page 3 provides a top level view of
multiphase power conversion using the ISL6322G controller.
I L1 + I L2 + I L3 , 7A/DIV
I L3 , 7A/DIV
PWM3, 5V/DIV
I L2 , 7A/DIV
PWM2, 5V/DIV
I L1 , 7A/DIV
this resistor to VCC will select slave address
two(1000_111x).
PWM1, 5V/DIV
1 μ s/DIV
The third function of this pin is a reset to the I 2 C registers.
During normal operation of the part, if this pin is ever
grounded, all of the I 2 C registers are reset to 0000_0000. An
open drain device is recommended as the means of
grounding this pin for resetting the I 2 C registers.
SCL
Connect this pin to the clock signal for the I 2 C bus, which is
a logic level input signal. The clock signal tells the controller
when data is available on the I 2 C bus.
SDA
Connect this pin to the bidirectional data line of the I 2 C bus,
which is a logic level input/output signal. All I 2 C data is sent
over this line, including the address of the device the bus is
trying to communicate with, and what functions the device
should perform.
PGOOD
During normal operation PGOOD indicates whether the
output voltage is within specified overvoltage and
undervoltage limits. If the output voltage exceeds these limits
or a reset event occurs (such as an overcurrent event),
10
FIGURE 1. PWM AND INDUCTOR-CURRENT WAVEFORMS
FOR 3-PHASE CONVERTER
Interleaving
The switching of each channel in a multiphase converter is
timed to be symmetrically out of phase with each of the other
channels. For example, in a 3-phase converter, each
channel switches 1/3 cycle after the previous channel and
1/3 cycle before the following channel. As a result, the
3-phase converter has a combined ripple frequency 3x
greater than the ripple frequency of any one phase. In
addition, the peak-to-peak amplitude of the combined
inductor currents is reduced in proportion to the number of
phases (Equations 1 and 2). Increased ripple frequency and
lower ripple amplitude mean that the designer can use less
per-channel inductance and lower total output capacitance
for any performance specification.
Figure 1 illustrates the multiplicative effect on output ripple
frequency. The three channel currents (I L1 , I L2 , and I L3 )
combine to form the AC ripple current and the DC load
current. The ripple component has 3x the ripple frequency of
each individual channel-current. Each PWM pulse is
FN6715.0
May 22, 2008
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| ISL6322GIRZ-T | 功能描述:IC CTRLR PWM BUCK 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6322IRZ | 功能描述:IC CTRLR PWM 4PHASE BUCK 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
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