参数资料
| 型号： | ISL6323BIRZ-T |
| 厂商： | Intersil |
| 文件页数： | 21/36页 |
| 文件大小： | 0K |
| 描述： | IC PWM CTRLR SYNC BUCK DL 48QFN |
| 标准包装： | 4,000 |
| 应用： | 控制器，AMD SVI |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 2 |
| 输出电压： | 最高 2V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 带卷 (TR) |
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ISL6323B
V OUT
This VID-on-the-fly compensation network works by
sourcing AC current into the FB node to offset the effects of
+
V OFS
-
R FB
VREF
E/A
the AC current flowing from the FB to the COMP pin during a
VID transition. To create this compensation current the
ISL6323B sets the voltage on the DVC pin to be 2x the
voltage on the REF pin. Since the error amplifier forces the
FB
I OFS
voltage on the FB pin and the REF pin to be equal, the
resulting voltage across the series RC between DVC and FB
is equal to the REF pin voltage. The RC compensation
components, R DVC and C DVC , can then be selected to
create the desired amount of compensation current.
The amount of compensation current required is dependant
on the modulator gain of the system, K1, and the error
-
1.6V
amplifier R-C components, R C and C C , that are in series
+
+
between the FB and COMP pins. Use Equations 17, 18 and
R OFS
OFS
GND
ISL6323B
-
GND
0.3V
VCC
19 to calculate the RC component values, R DVC and C DVC ,
for the VID-on-the-fly compensation network. For these
equations: V IN is the input voltage for the power train; V P-P
is the oscillator ramp amplitude (1.5V); and R C and C C are
the error amplifier R-C components between the FB and
FIGURE 10. POSITIVE OFFSET OUTPUT VOLTAGE
PROGRAMMING
COMP pins.
C RCOMP = --------
To further improve dynamic VID performance, ISL6323B
also implements a proprietary DAC smoothing feature. The
external series RC components connected between DVC
R RCOMP = A × R C
C C
A
(EQ. 17)
(EQ. 18)
V IN
A = -----------------
and FB limit any stair-stepping of the output voltage during a
VID-on-the-Fly transition.
Compensating Dynamic VID Transitions
K1 = ------------
V P-P
K1
K1 – 1
(EQ. 16)
During a VID transition, the resulting change in voltage on
the FB pin and the COMP pin causes an AC current to flow
through the error amplifier compensation components from
the FB to the COMP pin. This current then flows through the
feedback resistor, R FB , and can cause the output voltage to
overshoot or undershoot at the end of the VID transition. In
order to ensure the smooth transition of the output voltage
during a VID change, a VID-on-the-fly compensation
network is required. This network is composed of a resistor
and capacitor in series, R DVC and C DVC , between the DVC
Advanced Adaptive Zero Shoot-Through Deadtime
Control (Patent Pending)
The integrated drivers incorporate a unique adaptive deadtime
control technique to minimize deadtime, resulting in high
efficiency from the reduced freewheeling time of the lower
MOSFET body-diode conduction, and to prevent the upper and
lower MOSFETs from conducting simultaneously. This is
accomplished by ensuring either rising gate turns on its
MOSFET with minimum and sufficient delay after the other has
turned off.
and the FB pin.
VSEN
R FB
I DVC = I C
During turn-off of the lower MOSFET, the PHASE voltage is
monitored until it reaches a -0.3V/+0.8V (forward/reverse
I DVC
C C
I C
R C
inductor current). At this time the UGATE is released to rise. An
auto-zero comparator is used to correct the r DS(ON) drop in the
phase voltage preventing false detection of the -0.3V phase
C DVC
R DVC
level during r DS(ON) conduction period. In the case of zero
DVC
FB
COMP
current, the UGATE is released after 35ns delay of the LGATE
dropping below 0.5V. When LGATE first begins to transition
-
+
ERROR
AMPLIFIER
low, this quick transition can disturb the PHASE node and
cause a false trip, so there is 20ns of blanking time once
LGATE falls until PHASE is monitored.
VDAC+RGND
ISL6323B INTERNAL CIRCUIT
Once the PHASE is high, the advanced adaptive
shoot-through circuitry monitors the PHASE and UGATE
voltages during a PWM falling edge and the subsequent
FIGURE 11. DYNAMIC VID COMPENSATION NETWORK
21
UGATE turn-off. If either the UGATE falls to less than 1.75V
FN6879.1
May 12, 2010
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6323BIRZ-TR5381 | 制造商:Intersil Corporation 功能描述:4+1 PHASE CONT. FOR CORE+NORTHBRIDGE,2 PHASE PSI, 3.4MHZ SVI - Tape and Reel 制造商:Intersil Corporation 功能描述:IC PWM CTRLR SYNC BUCK DL 48QFN 制造商:Intersil 功能描述:4+1 PHS CONT CORE + NORTHBRDG PROG |
| ISL6323CRZ | 功能描述:IC HYBRID CTRLR PWM MONO 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6323CRZR5285 | 制造商:Intersil Corporation 功能描述: |
| ISL6323CRZ-T | 功能描述:IC HYBRID CTRLR PWM MONO 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6323EVAL1Z | 功能描述:EVAL BOARD 1 FOR ISL6323 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
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