参数资料
型号: ISL6405I2C-KIT-EVAL
厂商: Intersil
文件页数: 12/13页
文件大小: 0K
描述: EVALUATION BOARD I2C ISL6405
标准包装: 1
主要目的: 特殊用途 DC/DC,LNB
输出及类型: 2,非隔离
输入电压: 8 ~ 14 V
稳压器拓扑结构: 降压
板类型: 完全填充
已供物品:
已用 IC / 零件: ISL6405
ISL6405
Small Outline Exposed Pad Plastic Packages (EPSOIC)
N
INDEX
AREA
E
-B-
H
0.25(0.010) M
B M
M28.3B
28 LEAD WIDE BODY SMALL OUTLINE EXPOSED PAD
PLASTIC PACKAGE
INCHES
SYMBOL
MIN
NOMINAL
MAX
NOTES
1
2
3
A
0.091
-
0.099
-
A1
0.001
-
0.005
-
TOP VIEW
SEATING PLANE
L
B
C
D
0.014
0.0091
0.701
-
-
-
0.019
0.0125
0.711
9
-
3
-A-
D
A
h x 45 o
E
e
0.292
-
0.050 BSC
0.299
4
-
e
-C-
A1
α
C
H
h
L
0.400
0.010
0.024
-
-
-
0.410
0.016
0.040
-
5
6
B
0.10(0.004)
N
28
7
0.25(0.010) M
SIDE VIEW
C A M
B S
α
P
0.180
0.214
0.218
-
11
P1
0.156
0.190
0.194
11
Rev. 0 5/02
1
2
3
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
N
P
BOTTOM VIEW
P1
2. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: INCH.
11. Dimensions “P” and “P1” are thermal and/or electrical enhanced
variations. Values shown are maximum size of exposed pad
within lead count body size.
12
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