参数资料
| 型号： | ISL6422BERZ-T |
| 厂商： | Intersil |
| 文件页数： | 9/18页 |
| 文件大小： | 0K |
| 描述： | IC VREG DUAL LNB W/I2C 40-QFN |
| 标准包装： | 4,000 |
| 应用： | 转换器，卫星信号接收机顶盒设计 |
| 输入电压： | 8 V ~ 14 V |
| 输出数： | 2 |
| 输出电压： | 13.3 V ~ 18.3 V，14.3 V ~ 19.3 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-VFQFN 裸露焊盘 |
| 供应商设备封装： | 40-QFN（6x6） |
| 包装： | 带卷 (TR) |
ISL6422B
Functional Pin Description
SYMBOL
SDA
SCL
VSW1, VSW2
PGND1, PGND2
CS1, CS2
SGND
TCAP1, TCAP2
BYPASS
TXT1, TXT2
VCC
GATE1, GATE2
VO1, VO2
ADDR0, ADDR1
EXTM1, EXTM2
FLT
CPVOUT
SELVTOP1,
SELVTOP2
TDIN1, TDIN2,
FUNCTION
Bidirectional data from/to I 2 C bus.
Clock from I 2 C bus.
Input of the linear post-regulator.
Dedicated ground for the output gate driver of respective PWM.
Current sense input; connect the sense resistor R SC at this pin for desired overcurrent value for respective PWM.
Small signal ground for the IC.
Capacitor for setting rise and fall time of the output of LNB A and LNB B respectively. Typical value is 0.15μF.
Bypass capacitor for internal 5V.
TXT1 and TXT2 are the Tone Transmit signal inputs used to change the tone decoder threshold. The threshold is 200mV max
for the Rx mode. The TXT1, TXT2 are set low and the threshold is 400mV min in the Tx mode when TXT1, TXT2 are set high.
Main power supply to the chip.
These are the gate drive outputs of PWM A and PWM B respectively. These high current driver outputs are capable of driving
the gate of a power FET. These outputs are actively held low when V CC is below the UVLO threshold.
Output voltage for LNB A and LNB B respectively.
Address pins select four different device addresses per Table 19.
These pins can be used in two ways :
1) As an input for externally modulated DiSEqC tone signal which is transfered to the symetrically onto V OUT
2) Alternatively apply a DiSEqC modulation envelope which modulates an internal tone and then transfers it symetrically onto
V OUT
This is an open drain output from the controller. When the FLT goes low it indicates that an Over-Temperature, Over Load
Fault, UVLO, or a condition causing I 2 C to reset has occured. The processor should then look at the I 2 C register to get the
actual cause of the error. A high on the FLT indicates that the device is functioning normally.
Charge pump decoupling capacitor is to be connected to this pin.
When this pin is low, the V OUT is in the 13.3V/14.3V range selected by the I 2 C bit VBOT1 and VBOT2.
When this pin is high, the 18.3V/19.3V range is selected by the I 2 C bit VTOP1 and VTOP2.
The voltage select pin voltage VSPEN1, VSPEN2 I 2 C bit must be set low for the SELVTOP1, SELVTOP2 pins to be active.
Setting VSPEN1, VSPEN2 high disables these pins and voltage selection will be done using the I 2 C bits VBOT1, VBOT2 and
VTOP1, VTOP2 only.
TDIN1, TDIN2 are the tone decoder inputs for Channels 1 and 2. TDOUT1, TDOUT2 are the tone detector outputs for Channels
TDOUT1, TDOUT2 1 and 2. TDOUT1, TDOUT2 are open drain outputs.
9
FN6486.1
August 10, 2007
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6422BEVEZ | 功能描述:直流/直流开关转换器 DL LNB SUPPLY + CONT VAGEG W/I2C RoHS:否 制造商:STMicroelectronics 最大输入电压:4.5 V 开关频率:1.5 MHz 输出电压:4.6 V 输出电流:250 mA 输出端数量:2 最大工作温度:+ 85 C 安装风格:SMD/SMT |
| ISL6422BEVEZ-T | 功能描述:直流/直流开关转换器 DL LNB SUPPLY + CONT VAGEG W/I2C RoHS:否 制造商:STMicroelectronics 最大输入电压:4.5 V 开关频率:1.5 MHz 输出电压:4.6 V 输出电流:250 mA 输出端数量:2 最大工作温度:+ 85 C 安装风格:SMD/SMT |
| ISL6422ERZ | 功能描述:电流型 PWM 控制器 DL LNB SUPPLY + CONT VAGEG W/I2C RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL6422ERZ-T | 功能描述:电流型 PWM 控制器 DL LNB SUPPLY + CONT VAGEG W/I2C RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL6422EVEZ | 功能描述:电流型 PWM 控制器 DL LNB SUPPLY + CONT VAGEG W/I2C RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
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