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| 型号： | ISL6445IAZ-TK |
| 厂商： | Intersil |
| 文件页数： | 13/15页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 24-QSOP |
| 标准包装： | 1 |
| PWM 型： | 电流模式 |
| 输出数： | 2 |
| 频率 - 最大： | 1.55MHz |
| 占空比： | 73% |
| 电源电压： | 4.5 V ~ 24 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 包装： | 标准包装 |
| 其它名称： | ISL6445IAZ-TKDKR |
ISL6445
50
determined by the ESR (Equivalent Series Resistance) and
voltage rating requirements as well as actual capacitance
requirements.
The output voltage ripple is due to the inductor ripple current
40
T A = +50°C
and the ESR of the output capacitors as defined by
Equation 13:
V RIPPLE = Δ I L ( ESR )
(EQ. 13)
30
20
T A = +70°C
T A = +60°C
High frequency decoupling capacitors should be placed as
close to the power pins of the load as physically possible. Be
careful not to add inductance in the circuit board wiring that
could cancel the usefulness of these low inductance
10
6
9
12 15 18
INPUT VOLTAGE (V)
21
24
components. Consult with the manufacturer of the load
circuitry for specific decoupling requirements.
FIGURE 17. FET GATE CHARGE
Output Capacitor Selection
The output capacitors for each output have unique
requirements. In general, the output capacitors should be
selected to meet the dynamic regulation requirements
including ripple voltage and load transients. Selection of
output capacitors is also dependent on the output inductor,
so some inductor analysis is required to select the output
capacitors.
Use only specialized low-ESR capacitors intended for
switching-regulator applications at 1.4MHz for the bulk
capacitors. In most cases, multiple small-case electrolytic
capacitors perform better than a single large-case capacitor.
The stability requirement on the selection of the output
capacitor is that the ‘ESR zero’, f Z , be between 1.2kHz and
30kHz. This range is set by an internal, single compensation
zero at 6kHz. The ESR zero can be a factor of five on either
side of the internal zero and still contribute to increased
C OUT = -------------------------------------
One of the parameters limiting the converter ’s response to a
load transient is the time required for the inductor current to
slew to it’s new level. The ISL6445 will provide either 0% or
phase margin of the control loop. Therefore,
1
2 Π ( ESR ) ( f Z )
(EQ. 14)
71% duty cycle in response to a load transient.
The response time is the time interval required to slew the
inductor current from an initial current value to the load
current level. During this interval the difference between the
inductor current and the transient current level must be
supplied by the output capacitor(s). Minimizing the response
time can minimize the output capacitance required. Also, if
the load transient rise time is slower than the inductor
response time, as in a hard drive or CD drive, it reduces the
requirement on the output capacitor.
The maximum capacitor value required to provide the full,
rising step, transient load current during the response time of
the inductor is:
In conclusion, the output capacitors must meet three criteria:
1. They must have sufficient bulk capacitance to sustain the
output voltage during a load transient while the output
inductor current is slewing to the value of the load
transient,
2. The ESR must be sufficiently low to meet the desired
output voltage ripple due to the output inductor current,
and
3. The ESR zero should be placed, in a rather large range,
to provide additional phase margin.
The recommended output capacitor value for the ISL6445 is
between 150μF to 680μF, to meet stability criteria with
external compensation. Use of aluminum electrolytic,
( L O ) ( I TRAN )
2 ( V IN – V O ) ( DV OUT )
2
C OUT = -----------------------------------------------------------
(EQ. 12)
POSCAP, or tantalum type capacitors is recommended. Use
of low ESR ceramic capacitors is possible but would take
more rigorous loop analysis to ensure stability.
where, C OUT is the output capacitor(s) required, L O is the
output inductor, I TRAN is the transient load current step, V IN
is the input voltage, V O is output voltage, and DV OUT is the
drop in output voltage allowed during the load transient.
High frequency capacitors initially supply the transient
current and slow the load rate-of-change seen by the bulk
capacitors. The bulk filter capacitor values are generally
13
Output Inductor Selection
The PWM converters require output inductors. The output
inductor is selected to meet the output voltage ripple
requirements. The inductor value determines the converter ’s
ripple current and the ripple voltage is a function of the ripple
current and output capacitor(s) ESR. The ripple voltage
FN9230.1
June 3, 2008
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相关代理商/技术参数 |
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| ISL6445IAZ-TKS2645 | 制造商:Intersil Corporation 功能描述:DC DC CNTRLR DUAL-OUT STEP DOWN 4.5V TO 24V 24QSOP W - Tape and Reel |
| ISL6446AIAZ | 制造商:Intersil Corporation 功能描述:PB-FREE W/ANNEAL DUAL PWM CONTROLLER WITH LARGE DRIVERS AND - Rail/Tube 制造商:Intersil Corporation 功能描述:IC REG TRPL BUCK/LINEAR 24QSOP 制造商:Intersil Corporation 功能描述:ISL6446 Series 5.5 V 2.6 MHz Dual PWM and Linear Controller - QSOP-24 制造商:Intersil Corporation 功能描述:Pb-Free w/Anneal Dual PWM controller with large drivers and |
| ISL6446AIAZ-TK | 制造商:Intersil Corporation 功能描述:PB-FREE W/ANNEAL DUAL PWM CONTROLLER WITH LARGE DRIVERS AND - Tape and Reel 制造商:Intersil Corporation 功能描述:IC REG TRPL BUCK/LINEAR 24QSOP 制造商:Intersil Corporation 功能描述:Pb-Free w/Anneal Dual PWM controller with large drivers and T/R |
| ISL6446IAZ | 制造商:Intersil Corporation 功能描述:DUAL PWM CONTROLLER 制造商:Intersil Corporation 功能描述:PB-FREE W/ANNEAL DUAL PWM CONTROLLER WITH LARGE DRIVERS AND - Rail/Tube 制造商:Intersil Corporation 功能描述:IC REG TRPL BUCK/LINEAR 24QSOP |
| ISL6446IAZ-T | 制造商:Intersil Corporation 功能描述:PB-FREE W/ANNEAL DUAL PWM CONTROLLER WITH LARGE DRIVERS AND - Tape and Reel |
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