参数资料
型号: ISL6520IBZ-T
厂商: Intersil
文件页数: 5/11页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 8-SOIC
标准包装: 2,500
PWM 型: 电压模式
输出数: 1
频率 - 最大: 340kHz
占空比: 100%
电源电压: 4.5 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
ISL6520
Start interval and causes an over-current trip. The converter
dissipates very little power with this method. The measured
input power for the conditions of Figure 1 is only 1.5W.
OUTPUT INDUCTOR
CURRENT
5A/DIV.
TIME (5ms/DIV.)
FIGURE 1. OVERCURRENT OPERATION
The over-current function will trip at a peak inductor current
(I PEAK) determined by:
(FB pin) voltage, the output voltage is in regulation. This
method provides a rapid and controlled output voltage rise. The
entire startup sequence typically take about 11ms.
V OUT
500mV/DIV.
COMP/OCSET
1V/DIV.
TIME (2ms/DIV.)
FIGURE 2. START UP SEQUENCE
Application Guidelines
r DS ( ON )
I OCSET x R OCSET
I PEAK = -----------------------------------------------------
(EQ. 3)
Layout Considerations
As in any high frequency switching converter, layout is very
where I OCSET is the internal OCSET current source (20 μ A
typical). The OC trip point varies mainly due to the
MOSFET’s r DS(ON) variations. To avoid over-current tripping
in the normal operating load range, find the R OCSET resistor
from the equation above with:
1. The maximum r DS(ON) at the highest junction
important. Switching current from one power device to another
can generate voltage transients across the impedances of the
interconnecting bond wires and circuit traces. These
interconnecting impedances should be minimized by using
wide, short printed circuit traces. The critical components
should be located as close together as possible, using ground
plane construction or single point grounding.
temperature.
2. The minimum I OCSET from the specification table.
ISL6520
V IN
3. Determine I PEAK for I PEAK > I OUT ( MAX ) + ---------- ,
( Δ I )
2
where Δ I is the output inductor ripple current.
UGATE
PHASE
Q 1
L O
V OUT
For an equation for the ripple current, see“Output Inductor
Soft-Start
LGATE
Q 2
C IN
C O
The POR function initiates the soft-start sequence after the
overcurrent set point has been sampled. Soft-start clamps the
error amplifier output (COMP pin) and reference input (non-
inverting terminal of the error amp) to the internally generated
Soft-Start voltage. Figure 2 shows a typical start up interval
where the COMP/OCSET pin has been released from a
grounded (system shutdown) state. Initially, the COMP/OCSET
is used to sample the oversurrent setpoint by disabling the error
amplifier and drawing 20 μ A through R OCSET . Once the over-
current level has been sampled, the soft start function is
initiated. The clamp on the error amplifier (COMP/OCSET pin)
initially controls the converter’s output voltage during soft start.
The oscillator’s triangular waveform is compared to the ramping
error amplifier voltage. This generates PHASE pulses of
increasing width that charge the output capacitor(s). When the
internally generated Soft-Start voltage exceeds the feedback
5
RETURN
FIGURE 3. PRINTED CIRCUIT BOARD POWER AND
GROUND PLANES OR ISLANDS
Figure 3 shows the critical power components of the converter.
To minimize the voltage overshoot, the interconnecting wires
indicated by heavy lines should be part of a ground or power
plane in a printed circuit board. The components shown in
Figure 3 should be located as close together as possible.
Please note that the capacitors C IN and C O may each
represent numerous physical capacitors. Locate the ISL6520
within 3 inches of the MOSFETs, Q 1 and Q 2 . The circuit traces
for the MOSFETs’ gate and source connections from the
ISL6520 must be sized to handle up to 1A peak current.
FN9009.6
April 3, 2007
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