参数资料
型号: ISL6536IB
厂商: Intersil
文件页数: 7/7页
文件大小: 0K
描述: IC SUPERVISOR 4-CHAN 8-SOIC
标准包装: 98
类型: 多压监控器
监视电压数目: 4
输出: 开路漏极或开路集电极
复位: 低有效
电压 - 阀值: 可调节/可选择
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
ISL6536
Package Outline Drawing
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 2, 11/10
DETAIL "A "
1.27 (0.050)
0.40 (0.016)
INDEX
6.20 (0.244)
AREA
4.00 (0.157)
5.80 (0.228)
0.50 (0.20)
0.25 (0.01)
x 45°
3.80 (0.150)
8 °
1
2
3
0.25 (0.010)
0.19 (0.008)
TOP VIEW
SIDE VIEW “B”
2.41 (0.095)
SEATING PLANE
1
8
5.00 (0.197)
4.80 (0.189)
1.75 (0.069)
1.35 (0.053)
2
7
0.76 (0.030)
1.27 (0.050)
-C-
3
4
6
5
1.27 (0.050)
0.51(0.020)
0.33(0.013)
SIDE VIEW “A
7
0.25(0.010)
0.10(0.004)
0.200
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
3. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual index fea-
ture must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above the seat-
ing plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
8. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
FN9114.3
January 25, 2011
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