参数资料
型号: ISL6537A-6506EVAL1Z
厂商: Intersil
文件页数: 1/16页
文件大小: 0K
描述: EVALUATION BOARD ISL986A-6506
标准包装: 1
主要目的: 特殊用途 DC/DC,DDR 存储器电源
输出及类型: 7,非隔离
功率 - 输出: 178W
输出电压: 1.8V,3.3V,5V,1.5V,1.2V,2.5V,0.9V
电流 - 输出: 15A,14A,14A,10A,5A,5A,2A
输入电压: 3.3V,5V,12V
稳压器拓扑结构: 降压
板类型: 完全填充
已供物品:
已用 IC / 零件: ISL6506,ISL6537A
?
ISL6537A
Data Sheet
July 18, 2007
FN9143.5
ACPI Regulator/Controller for
Dual Channel DDR Memory Systems
The ISL6537A provides a complete ACPI compliant power
solution for up to 4 DIMM dual channel DDR/DDR2 Memory
systems. Included are both a synchronous buck controller to
supply V DDQ during S0/S1 and S3 states. During S0/S1 state,
a fully integrated sink-source regulator generates an accurate
(V DDQ /2) high current V TT voltage without the need for a
negative supply. A buffered version of the V DDQ /2 reference is
provided as V REF . A second PWM controller, which requires
external MOSFET drivers, is available for regulation of the
GMCH Core voltage. An LDO controller is also integrated for
the CPU V TT termination voltage regulation and the DAC.
The switching PWM controller drives two N-Channel
MOSFETs in a synchronous-rectified buck converter
topology. The synchronous buck converter uses voltage-
mode control with fast transient response. The switching
regulator provides a maximum static regulation tolerance of
± 2% over line, load, and temperature ranges. The output is
user-adjustable by means of external resistors down to 0.8V.
An integrated soft-start feature brings all outputs into
regulation in a controlled manner when returning to S0/S1
state from any sleep state. During S0 the VIDPGD signal
indicates that the GMCH and CPU V TT termination voltage
is within spec and operational.
All outputs, except VDAC, have undervoltage protection.
The switching regulator also has overvoltage and
overcurrent protection. Thermal shutdown is integrated.
Features
? Generates 5 Regulated Voltages
- Synchronous Buck PWM Controller for DDR V DDQ
- 3A Integrated Sink/Source Linear Regulator with
Accurate VDDQ/2 Divider Reference for DDR V TT
- PWM Regulator for GMCH Core
- LDO Regulator for CPU/GMCH V TT Termination
- LDO Regulator for DAC
? ACPI Compliant Sleep State Control
? Glitch-Free Transitions During State Changes
? Integrated V REF Buffer
? V DDQ PWM Controller Drives Low Cost N-Channel
MOSFETs
? 250kHz Constant Frequency Operation
- Both PWM Controllers are Phase Shifted 180°
? Tight Output Voltage Regulation
- All Outputs: ± 2% Over Temperature
? Fully-Adjustable Outputs with Wide Voltage Range: Down
to 0.8V Supports DDR and DDR2 Specifications
? Simple Single-Loop Voltage-Mode PWM Control Design
? Fast PWM Converter Transient Response
? Under and Overvoltage Monitoring
? OCP on the V DDQ Switching Regulator
Pinout
ISL6537A (6X6 QFN)
TOP VIEW
? Integrated Thermal Shutdown Protection
? Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
28
27
26
25
24
23
22
? Single and Dual Channel DDR Memory Power Systems in
ACPI Compliant PCs
5VSBY
S3#
P12V
1
2
3
21
20
19
DRIVE3
FB3
PWM4
? Graphics Cards - GPU and Memory Supplies
? ASIC Power Supplies
? Embedded Processor and I/O Supplies
GND
GND
DDR_VTT
DDR_VTT
VDDQ
4
5
6
7
29
18
17
16
15
FB4
COMP4
COMP
FB
? DSP Supplies
8
9
10
11
12
13
14
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright ? Intersil Americas Inc. 2004, 2005, 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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