参数资料
| 型号： | ISL6556ACBZ-T |
| 厂商： | Intersil |
| 文件页数： | 19/25页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR MULTIPHASE VRM10 28SOIC |
| 标准包装： | 1,000 |
| 应用： | 控制器，Intel VR10X |
| 输入电压： | 3 V ~ 12 V |
| 输出数： | 4 |
| 输出电压： | 0.84 V ~ 1.6 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC W |
| 包装： | 带卷 (TR) |
ISL6556A
yields a solution that is always stable with very close to ideal
transient performance.
R ISEN , 2 = R ISEN ---------- 2
Δ T
Δ T 1
(EQ. 18)
C 2 (OPTIONAL)
the measured temperature rise above the ambient
temperature. While a single adjustment according to Equation
R C
C C
COMP
FB
18 is usually sufficient, it may occasionally be necessary to
adjust R ISEN two or more times to achieve optimal thermal
R FB
+
V DROOP
IOUT
balance between all channels.
Load-Line Regulation Resistor
The load-line regulation resistor is labeled R FB in Figure 5.
Its value depends on the desired full-load droop voltage
(V DROOP in Figure 5). If Equation 17 is used to select each
ISEN resistor, the load-line regulation resistor is as shown
in Equation 19.
-
VDIFF
FIGURE 12. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6556A CIRCUIT
The feedback resistor, R FB , has already been chosen as
outlined in Load-Line Regulation Resistor . Select a target
6
V DROOP
R FB = -------------------------
70 × 10
(EQ. 19)
bandwidth for the compensated system, f 0 . The target
bandwidth must be large enough to assure adequate
transient performance, but smaller than 1/3 of the per-
If one or more of the ISEN resistors is adjusted for thermal
balance, as in Equation 18, the load-line regulation resistor
should be selected according to Equation 20 where I FL is the
full-load operating current and R ISEN(n) is the ISEN resistor
connected to the n th ISEN pin.
channel switching frequency. The values of the
compensation components depend on the relationships of f 0
to the L-C pole frequency and the ESR zero frequency. For
each of the following three, there is a separate set of
equations for the compensation components.
∑ R ISEN ( n )
V DROOP
R FB = --------------------------------
------------------- > f 0
R C = R FB ------------------------------------
0.75V
2 π V PP R FB f 0
------------------- ≤ f 0 < ------------------------------
(EQ. 20)
I FL r DS ( ON ) n
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation .
Case 1:
Case 2:
1
2 π LC
2 π f 0 V pp LC
IN
0.75V IN
C C = ------------------------------------
1 1
2 π LC 2 π C ( ESR )
R C = R FB --------------------------------------------
0.75 V
C C = -------------------------------------------------------------
PP R FB LC
( 2 π ) 2 f 2 V
COMPENSATING LOAD-LINE REGULATED
CONVERTER
The load-line regulated converter behaves in a similar
manner to a peak-current mode controller because the two
poles at the output-filter L-C resonant frequency split with
the introduction of current information into the control loop.
V PP ( 2 π ) 2 f 02 LC
IN
0.75V IN
0
(EQ. 21)
f 0 > ------------------------------
The final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
Case 3:
1
2 π C ( ESR )
0.75 V IN ( ESR )
2 π V PP R FB f 0 L
compensation components, R C and C C .
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator by compensating the L-C
poles and the ESR zero of the voltage-mode approximation
19
2 π f 0 V pp L
R C = R FB ------------------------------------------
0.75V IN ( ESR ) C
C C = -------------------------------------------------
In Equations 21, L is the per-channel filter inductance
divided by the number of active channels; C is the sum total
of all output capacitors; ESR is the equivalent-series
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| ISL6556ACR-T | 功能描述:IC CTRLR MULTIPHASE VRM10 32-QFN RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
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| ISL6556ACRZ-T | 功能描述:IC CTRLR MULTIPHASE VRM10 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6556ACRZ-TR5208 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述: |
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