参数资料
型号: ISL6567IRZ-T
厂商: Intersil
文件页数: 21/25页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 24-QFN
标准包装: 6,000
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.5MHz
占空比: 66%
电源电压: 4.9 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 24-VFQFN 裸露焊盘
包装: 带卷 (TR)
ISL6567
LAYOUT CONSIDERATIONS
MOSFETs switch very fast and efficiently. The speed with which
the current transitions from one device to another causes
voltage spikes across the interconnecting impedances and
parasitic circuit elements. These voltage spikes can degrade
efficiency, radiate noise into the circuit and lead to device
overvoltage stress. Careful component layout and printed
circuit design minimizes the voltage spikes in the converter.
Consider, as an example, the turnoff transition of the upper
PWM MOSFET. Prior to turnoff, the upper MOSFET was carrying
channel current. During the turnoff, current stops flowing in the
upper MOSFET and is picked up by the lower MOSFET. Any
inductance in the switched current path generates a large
voltage spike during the switching interval. Careful component
selection, tight layout of the critical components, and short,
wide circuit traces minimize the magnitude of voltage spikes.
+12V IN
L IN
There are two sets of critical components in a DC/DC converter
using a ISL6567 controller. The power components are the
most critical because they switch large amounts of energy.
Next are small signal components that connect to sensitive
nodes or supply critical bypassing current and signal coupling.
Although the ISL6567 allows for external adjustment of the
channel-to-channel current balancing (via the R ISEN resistors),
it is desirable to have a symmetrical layout, preferably with the
controller equidistantly located from the two power trains it
controls. Equally important are the gate drive lines (UGATE,
LGATE, PHASE): since they drive the power train MOSFETs
using short, high current pulses, it is important to size them
accordingly and reduce their overall impedance. Equidistant
placement of the controller to the two power trains also helps
keeping these traces equally long (equal impedances,
resulting in similar driving of both sets of MOSFETs).
+5V IN
(C F1 )
VCC
(C F2 )
PVCC
C BIN1
(C HFIN1 )
REFTRK
BOOT1
C BOOT1
R FS
FS
SS
UGATE1
PHASE1
Q1
L OUT1
LOCATE NEAR LOAD
(MINIMIZE CONNECTION PATH)
C SS
ISEN1
R ISEN1
Q2
MON
LGATE1
BOOT2
V OUT
R EN
R PG
PGOOD
ISL6567
UGATE2
C BOOT2
Q3
C BIN2
(C HFIN2 )
C BOUT
(C HFOUT )
EN
COMP
PHASE2
C 2
R 2
C 1
ISEN2
LGATE2
R ISEN2
Q4
L OUT2
R S
PGND
FB
R P
R 1
GND
LOCATE NEAR SWITCHING TRANSISTORS
(MINIMIZE CONNECTION PATH)
VDIFF
VSEN
RGND
KEY
LOCATE CLOSE TO IC
(MINIMIZE CONNECTION PATH)
HEAVY TRACE ON CIRCUIT PLANE LAYER
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT PLANE LAYER
VIA CONNECTION TO GROUND PLANE
FIGURE 26. PRINTED CIRCUIT BOARD POWER PLANES AND ISLANDS
21
FN9243.4
August 9, 2011
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