参数资料
| 型号： | ISL6568IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 20/30页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM BUCK 2PHASE 32-QFN |
| 标准包装： | 6,000 |
| 应用： | 控制器，Intel VRM9，VRM10，AMD Hammer 应用 |
| 输入电压： | 3 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.84 V ~ 1.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN（5x5） |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页当前第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页
ISL6568
can be pushed as high as 40A per phase, but these designs
I MAX ? R COMP ? DCR
R OCSET = ----------------------------------------------------------
(EQ. 14)
100 μ ? R S
Once the output current exceeds the overcurrent trip level,
V DROOP will exceed V OCSET , and a comparator will trigger the
converter to begin overcurrent protection procedures. At the
beginning of overcurrent shutdown, the controller turns off
both upper and lower MOSFETs. The system remains in this
state for a period of 4096 switching cycles. If the controller is
still enabled at the end of this wait period, it will attempt a
soft-start (as shown in Figure 14). If the fault remains, the trip-
retry cycles will continue indefinitely until either the controller
is disabled or the fault is cleared. Note that the energy
delivered during trip-retry cycling is much less than during
full-load operation, so there is no thermal hazard.
require heat sinks and forced air to cool the MOSFETs,
inductors and heat-dissipating surfaces.
MOSFETS
The choice of MOSFETs depends on the current each MOSFET
will be required to conduct, the switching frequency, the
capability of the MOSFETs to dissipate heat, and the availability
and nature of heat sinking and air flow.
LOWER MOSFET POWER CALCULATION
The calculation for power loss in the lower MOSFET is simple,
since virtually all of the loss in the lower MOSFET is due to
current conducted through the channel resistance (r DS(ON) ). In
Equation 15, I M is the maximum continuous output current,
I P-P is the peak-to-peak inductor current (see Equation 1 on
page 10), and d is the duty cycle (V OUT /V IN ).
? I M ? 2 I L ( P-P 2 ( 1 – d )
P LOW , 1 = r DS ( ON ) ? ------ ? ( 1 – d ) + ------------------------------------
OUTPUT CURRENT, 50A/DIV
? N ? 12
(EQ. 15)
An additional term can be added to the lower-MOSFET loss
0A
OUTPUT VOLTAGE,
500mV/DIV
equation to account for additional loss accrued during the
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the diode
forward voltage at I M , V D(ON) , the switching frequency, f S , and
the length of dead times, t d1 and t d2 , at the beginning and the
end of the lower-MOSFET conduction interval respectively.
P LOW , 2 = V D ( ON ) f S ? ------ + I ---------- ? t
I P-P ?
d1 + ? ------ – ---------- ? t d2
0V
2ms/DIV
I M P-P
? N 2 ?
? I
M
? N 2 ?
(EQ. 16)
FIGURE 14. OVERCURRENT BEHAVIOR IN HICCUP MODE
F SW = 500kHz
General Design Guide
This design guide is intended to provide a high-level explanation of
the steps necessary to create a multi-phase power converter. It is
assumed that the reader is familiar with many of the basic skills
and techniques referenced below. In addition to this guide, Intersil
provides complete reference designs that include schematics, bill
of materials, and example board layouts for all common
microprocessor applications.
Power Stages
The first step in designing a multi-phase converter is to
determine the number of phases. This determination depends
heavily on the cost analysis which in turn depends on system
constraints that differ from one design to the next. Principally,
the designer will be concerned with whether components can
be mounted on both sides of the circuit board, whether
through-hole components are permitted, the total board space
available for power-supply circuitry, and the maximum amount
The total maximum power dissipated in each lower MOSFET is
approximated by the summation of P LOW,1 and P LOW,2 .
UPPER MOSFET POWER CALCULATION
In addition to r DS(ON) losses, a large portion of the upper-
MOSFET losses are due to currents conducted across the input
voltage (V IN ) during switching. Since a substantially higher
portion of the upper-MOSFET losses are dependent on
switching frequency, the power calculation is more complex.
Upper MOSFET losses can be divided into separate
components involving the upper-MOSFET switching times, the
lower-MOSFET body-diode reverse-recovery charge, Q rr , and
the upper MOSFET r DS(ON) conduction loss.
When the upper MOSFET turns off, the lower MOSFET does not
conduct any portion of the inductor current until the voltage at
the phase node falls below ground. Once the lower MOSFET
begins conducting, the current in the upper MOSFET falls to
zero as the current in the lower MOSFET ramps up to assume
the full inductor current. In Equation 17, the required time for
this commutation is t 1 and the approximated associated
power loss is P UP,1 .
P UP ( 1 ) ≈ V IN ? ------ + ---------- ? ? ---- 1 ? f S
of load current. Generally speaking, the most economical
solutions are those in which each phase handles between 25A
and 30A. All surface-mount designs will tend toward the lower
end of this current range. If through-hole MOSFETs and
inductors can be used, higher per-phase currents are possible.
In cases where board space is the limiting constraint, current
20
? N 2 ? ? 2 ?
I M I P-P ? t ?
(EQ. 17)
FN9187.5
January 12, 2012
相关PDF资料 |
PDF描述 |
|---|---|
| LT1175CS8#PBF | IC REG LDO NEG ADJ .5A 8SOIC |
| ABC17DRES | CONN EDGECARD 34POS .100 EYELET |
| LT1129IQ-3.3#PBF | IC REG LDO 3.3V .7A DDPAK-5 |
| LT1129IS8-3.3#PBF | IC REG LDO 3.3V .7A 8SOIC |
| ISL6455AIRZ-TK | IC REG TRPL SYNCH DUAL LDO 24QFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6568IRZ-TR5184 | 功能描述:IC CTRLR PWM 2PHASE BUCK 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6569ACB | 功能描述:IC REG CTRLR BUCK PWM 24-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
| ISL6569ACB-T | 功能描述:IC REG CTRLR BUCK PWM 24-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
| ISL6569ACBZ | 功能描述:IC REG CTRLR BUCK PWM 24-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6569ACBZ-T | 功能描述:IC REG CTRLR BUCK PWM 24-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
发布紧急采购，3分钟左右您将得到回复。