参数资料
| 型号： | ISL6571CRZ |
| 厂商： | Intersil |
| 文件页数： | 7/11页 |
| 文件大小： | 0K |
| 描述： | IC MOSF DRVR/SYNC SW COMPL 68QFN |
| 标准包装： | 168 |
| 类型： | 半桥 |
| 输入类型： | PWM |
| 电流 - 输出 / 通道： | 25A |
| 电源电压： | 10.8 V ~ 13.2 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 68-VFQFN 裸露焊盘 |
| 供应商设备封装： | 68-QFN 裸露焊盘（10x10） |
| 包装： | 管件 |
ISL6571
Typical Performance Curves/Setup (Continued)
93
91
89
87
85
83
81
79
77
75
73
200kHz
300kHz
500kHz
750kHz
0
1.5
3.0
4.5
6.0
7.5
9.0
10.5 12.0 13.5 15.0 16.5
OUTPUT CURRENT (A)
FIGURE 10. ISL6571 EFFICIENCY AT 200kHz, 300kHz, 500kHz, 750kHz
Functional Pin Descriptions
VCC (Pin 54)
Provide a 12V bias supply for the driver IC to this pin. The
voltage at this pin is monitored for Power-On Reset (POR)
purposes.
PVCC (Pin 56)
Provide a well decoupled 5V to 10V bias supply at this pin.
The voltage at this pin is used to bias the gates of the
MOSFET switches.
GND (Pins 46, 50, 57, 71)
Ground pins for the driver IC. Connect these pins to the
circuit ground (plane) and to the PGND pins using the
shortest available paths.
PGND (Pins 60-68)
This is the source ground connection for the lower MOSFET
switches. Connect these pins to the circuit ground (plane)
and to the GND pins using the shortest available paths.
VIN (Pins 29-44, 70)
Connect these pins to the input voltage to be converted
down. Provide bulk and high-frequency decoupling
capacitors as close to these pins as feasible.
PHASE (Pins 1-17, 27, 45, 59, 69)
As a minimum, connect pin 69 to the output inductor. The
remainder of the PHASE pins may be tied to pin 69, left
open, or used for other connections. It is recommended pin
45 is connected to the bootstrap capacitor, C BOOT .
BOOT (Pin 47)
This pin is connected to the PVCC pin through an internal
quasi-diode. Connect a bootstrap capacitor from this pin to
PHASE pin 45 (0.1 μ F recommended). This capacitor
7
provides the bias for the upper MOSFET drive and the gate
charge for the upper MOSFET.
LGATE (Pin 53)
This pin is the output of the lower MOSFET drive. Connect
this pin to LGATE1 pin using the shortest available path.
LGATE1 (Pin 58)
This pin is connected to the gate of the lower MOSFET
switch. Connect this pin to LGATE pin using the shortest
available path.
PWM (Pin 48)
Connect this pin to the regulating controller ’s PWM output.
Left open, this input will float to approximately 2.5V and
cause both MOSFET switches to be turned off. Applying 5V
to this input causes the upper MOSFET switch to be turned
on. A 0V applied to this input causes the lower MOSFET
switch to be turned on. The approximate input impedance of
this pin is 5k ? .
NC (Pins 18-26, 28, 49, 51, 52, 55)
These pins are not internally connected.
Description
Bias Requirements
The on-board driver includes a Power-On Reset (POR)
function, which continually monitors the input bias supply.
The POR monitors the bias voltage (+12V IN ) at the VCC pin,
and enables the ISL6571 for operation immediately after it
exceeds the rising threshold. Upon the bias voltage’s drop
below the falling threshold, the IC is disabled and both
internal MOSFETs are turned off.
The output drivers are powered from the PVCC pin. For
proper functionality and driving capability, connect PVCC to
FN9082.4
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