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| 型号： | ISL6721AVZ |
| 厂商： | Intersil |
| 文件页数： | 13/22页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR PWM CM 16-TSSOP |
| 标准包装： | 96 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 1MHz |
| 占空比： | 100% |
| 电源电压： | 9 V ~ 18 V |
| 降压： | 是 |
| 升压： | 是 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 是 |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 包装： | 管件 |
| 产品目录页面： | 1243 (CN2011-ZH PDF) |
ISL6721
Maximum Primary Inductance:
Since:
V IN ( MIN ) ? t ON ( MAX )
μ o ? N p ? Aeff
L p = ----------------------------------------
Lp ( max ) = --------------------------------------------------------- = 43.3
I PPK
μ H
(EQ. 10)
2
lg
μ H
(EQ. 13)
Choose desired primary inductance to be 40μH.
The core structure must be able to deliver a certain amount
of energy to the secondary on each switching cycle in order
the number of primary turns, N p , may be calculated. The
result is N p = 40 turns. The secondary turns may be
calculated as follows:
Δ w = P OUT ? ------------------------------------
f sw ? V OUT
N s ≤ --------------------------------------------------------
to maintain the specified output power.
? V OUT + Vd ?
joules
(EQ. 11)
Ig ? ? Vout + Vd ? ? tr
N p ? Ippk ? μ o ? Aeff
where tr is the time required to reset the core. Since
(EQ. 14)
discontinuous MMF mode operation is desired, the core
2 ? μ o ? Δ w
(EQ. 12)
Vg = Aeff ? lg = -----------------------------
Δ B
where Δ w is the amount of energy required to be transferred
each cycle and Vd is the drop across the output rectifier.
The capacity of a gapped ferrite core structure to store
energy is dependent on the volume of the airgap and can be
expressed in Equation 12:
3
m
2
where Aeff is the effective cross sectional area of the core in
m 2 , lg is the length of the airgap in meters, μ o is the
permeability of free space (4 π ? 10 -7 ), and Δ B is the change
in flux density in Tesla.
A core structure having less airgap volume than calculated will
be incapable of providing the full output power over some
portion of its operating range. On the other hand, if the length
of the airgap becomes large, magnetic field fringing around
the gap occurs. This has the effect of increasing the airgap
volume. Some fringing is usually acceptable, but excessive
fringing can cause increased losses in the windings around
the gap resulting in excessive heating. Once a suitable core
and gap combination are found, the iterative design cycle
begins. A design is developed and checked for ease of
assembly and thermal performance. If the core does not allow
adequate space for the windings, then a core with a larger
window area is required. If the transformer runs hot, it may be
necessary to lower the flux density (more primary turns, lower
operating frequency), select a less lossy core material,
must completely reset during the off time. To maintain
discontinuous mode operation, the maximum time allowed to
reset the core is t sw - t ON(MAX) where t sw = 1/f sw . The
minimum time is application dependent and at the designers
discretion knowing that the secondary winding RMS current
and ripple current stress in the output capacitors increases
with decreasing reset time. The calculation for maximum N s
for the 3.3 V output using t = t sw - t ON (MAX) = 2.75μs is 5.52
turns.
The determination of the number of secondary turns is also
dependent on the number of outputs and the required turns
ratios required to generate them. If Schottky output rectifiers
are used and we assume a forward voltage drop of 0.45V,
the required turns ratio for the two output voltages, 3.3V and
1.8V, is 5:3.
With a turns ratio of 5:3 for the secondary windings, we will
use N s1 = 5 turns and N s2 = 3 turns. Checking the reset time
using these values for the number of secondary turns yields
a duration of Tr = 2.33μs or about 47% of the switching
period, an acceptable result.
The bias winding turns may be calculated similarly, only a
diode forward drop of 0.7V is used. The rounded off result is
17 turns for a 12V bias.
The next step is to determine the wire gauge. The RMS
current in the primary winding may be calculated using
Equation 15:
I P ( RMS ) = I PPK ? --------------------------- )
change the geometry of the windings (winding order), use
heavier gauge wire or multi-filar windings, and/or change the
type of wire used (Litz wire, for example).
t ON ( MAX
3 ? t sw
A
(EQ. 15)
For simplicity, only the final design is further described.
The peak and RMS current values in the remaining windings
may be calculated using Equations 16 and 17:
I SPK = -------------------------------------
An EPCOS EFD 20/10/7 core using N87 material gapped to
an A L value of 25nH/N 2 was chosen. It has more than the
2 ? I OUT ? t sw
Tr
A
(EQ. 16)
required air gap volume to store the energy required, but
was needed for the window area it provides.
I RMS = 2 ? I OUT ? ---------------
Aeff = 31 ? 10 -6
m 2
t sw
3 ? Tr
A
(EQ. 17)
lg = 1.56 ? 10 -3
m
The RMS current for the primary winding is 0.72A, for the
The flux density Δ B is only 0.069T or 690 gauss, a relatively
low value.
13
3.3V output, 4.23A, for the 1.8V output, 1.69A, and for the
bias winding, 85mA.
FN9110.6
March 5, 2008
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| ISL6721AVZ-T | 功能描述:IC REG CTRLR PWM CM 16-TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6721EVAL1 | 功能描述:EVALUATION BOARD ISL6721 RoHS:否 类别:RF/IF 和 RFID >> RF 评估和开发套件，板 系列:- 标准包装:1 系列:- 类型:GPS 接收器 频率:1575MHz 适用于相关产品:- 已供物品:模块 其它名称:SER3796 |
| ISL6721EVAL3Z | 功能描述:EVAL BOARD 3 FOR ISL6721 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ISL6722AABZ | 功能描述:IC REG CTRLR PWM CM 16-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6722AABZ-T | 功能描述:IC REG CTRLR PWM CM 16-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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