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| 型号： | ISL6740EVAL1 |
| 厂商： | Intersil |
| 文件页数： | 25/28页 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD 1 ISL6740 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 12V |
| 电流 - 输出： | 8A |
| 输入电压： | 48V |
| 稳压器拓扑结构： | 降压 |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ISL6740 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页当前第25页第26页第27页第28页
ISL6740, ISL6741
225
180
135
90
45
0
-45
-90
as the FET on resistance, copper losses, and inductor resistance.
The phase discrepancy above 60kHz is not particularly relevant
to the loop performance since it occurs well above the cross over
frequency. The predicted behavior indicates a much gentler drop
off of phase than was observed in the measured performance.
The discrepancy was not investigated.
Performance
The major performance criteria for the converter are efficiency
and load regulation. These quantities are detailed in Figures 27
and 28.
-135
100
1?10 3
1?10 4
1?10 5
95
FREQUENCY (Hz)
FIGURE 25B. PREDICTED LOOP PHASE MARGIN
The actual loop gain and phase margin measured on the
ISL6740EVAL2Z demonstration board appear in Figures 26A and
50
40
93
91
89
87
30
85
2
3
4
5
6
7
8
9
10
20
10
0
-10
-20
-30
-40
LOAD CURRENT (A)
FIGURE 27. EFFICIENCY vs LOAD V IN = 48V t
12.015
-50
0.1k
1k
10k
100k
12.010
FREQUENCY (Hz)
FIGURE 26A. MEASURED LOOP GAIN
12.005
12.000
225
180
135
11.995
0
1
2
3 4 5 6 7
LOAD CURRENT (A)
8
9
10
90
45
0
-45
-90
FIGURE 28. LOAD REGULATION AT V IN = 48V
The efficiency, although very good, could be further improved
using a controlled SR method instead of using a self-driven
method with an auxiliary schottky diode. The schottky diode
conducts when the main switching FETs are off. Its forward
-135
0.1k
1k
10k
100k
voltage drop is considerably larger than that of the SR FETs and
causes a measurable reduction in efficiency. The effect becomes
FREQUENCY (Hz)
FIGURE 26B. MEASURE LOOP PHASE MARGIN
The only major discrepancies between the predicted behavior
and the measured results are the Q of the L-C filter and the phase
behavior above 60kHz. The actual Q appears to be significantly
less than predicted resulting in less gain peaking and a less rapid
phase shift near the resonant frequency. This is most likely the
result of neglecting other losses in the converter’s output, such
25
more significant as the input voltage is increased due to the
reduction of duty cycle (and consequent increase in the OFF
time).
FN9111.6
December 2, 2011
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6740EVAL2 | 功能描述:EVALUATION BOARD 2 ISL6740 RoHS:否 类别:编程器，开发系统 >> 过时/停产零件编号 系列:- 标准包装:1 系列:- 传感器类型:CMOS 成像，彩色（RGB） 传感范围:WVGA 接口:I²C 灵敏度:60 fps 电源电压:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相关产品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
| ISL6740EVAL2Z | 功能描述:EVALUATION BOARD 2 ISL6740 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ISL6740EVAL3Z | 制造商:Intersil Corporation 功能描述:ISL6740 EVALUATION BOARD 3 - ROHS COMPLIANT - SOIC - DSL - Bulk 制造商:Intersil Corporation 功能描述:Power Management IC Development Tools ISL6740 EVAL RD 3 ROHS CMPL DSL |
| ISL6740IB | 功能描述:IC REG CTRLR PWM VM 16-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
| ISL6740IB-T | 功能描述:IC REG CTRLR PWM VM 16-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
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