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参数资料
型号： ISL6740IBZ
厂商： INTERSIL CORP
元件分类： 稳压器
英文描述： Flexible Double Ended Voltage and Current Mode PWM Controllers
中文描述： 0.5 A SWITCHING CONTROLLER, 2000 kHz SWITCHING FREQ-MAX, PDSO16
封装： ROHS COMPLIANT, PLASTIC, MS-012-AC, SOIC-16
文件页数： 16/29页
文件大小： 635K
代理商： ISL6740IBZ
23
FN9111.4
July 13, 2007
A block diagram of the feedback control loop follows in
Figure 19.
The loop compensation is placed around the Error Amplifier
(EA) on the secondary side of the converter. A Type 3 error
amplifier configuration was selected.
The control to output transfer function may be represented
as [1]
where
Ro = Output Load Resistance
L = Output Inductance
C = Output Capacitance
Rc = Output Capacitance ESR
VS = Sawtooth Ramp Amplitude
Gain and phase plots of (Equation 26) appear below using
L = 4.0
μH, C = 150μF, Rc = 28mΩ, Ro = 1.2Ω, and VIN = 75V.
The Type 3 compensation configuration has three poles and
two zeros. The first pole is at the origin, and provides the
integration characteristic which results in excellent DC
regulation. Referring to the Typical Application Schematic for
the regulated output, the remaining poles and zeros for the
compensator are located at:
From (Equation 26), it can be seen that the control to output
transfer function frequency dependence is a function of the
output load resistance, the value of output capacitor and
inductor, and the output capacitance ESR. These variations
must be considered when compensating the control loop.
The worst case small signal operating point for a voltage
mode converter tends to be at maximum Vin, maximum load,
maximum COUT, and minimum ESR.
FIGURE 19. CONTROL LOOP BLOCK DIAGRAM
PWM
POWER
STAGE
Z1
Z2
REF
+
-
ISOLATION
ERROR AMPLIFIER
VOUT
FIGURE 20. TYPE 3 ERROR AMPLIFIER
REF
+
-
VOUT
VERR
v
o
v
c
------
V
IN
V
S
2
----------------
N
S
N
P
--------
1
s
ω
z
------
+
1
s
Q
()ω
o
-----------------
s
ω
o
-------
2
++
-------------------------------------------------
=
(EQ. 26)
Q
R
o
ω
o
L
----------------
=
ω
o
1
LC
------------
=
or
f
o
1
2
π LC
-------------------
=
ω
z
1
R
cC
-----------
=
or
f
z
1
2
πR
cC
-------------------
=
FIGURE 21A. CONTROL-TO-OUTPUT GAIN
10
100
1106
-20
-10
0
10
20
30
40
FREQUENCY (Hz)
GAI
N
(d
B)
1105
1104
1103
FIGURE 21B. CONTROL-TO-OUTPUT PHASE
10
100
1106
-200
-150
-100
-50
0
50
FREQUENCY (Hz)
P
H
A
S
E
(
D
EG
R
E
S
)
1105
1104
1103
f
p2
1
2
π R21 C20
-----------------------------------------
=
(EQ. 27)
f
p3
1
2
π R4
C22
--------------------------------------
≈
C19
C20
(EQ. 28)
f
z1
1
2
π R21
C19
-----------------------------------------
=
(EQ. 29)
f
z2
1
2
π R23
C22
-----------------------------------------
≈
R23
R4
(EQ. 30)
ISL6740, 1SL6741
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ISL6740IVZ 功能描述:电压模式 PWM 控制器 VOLT PWM MODE CONTRL 16LD TSSOP RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel
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