参数资料
型号: ISL6844EVAL2
厂商: Intersil
文件页数: 2/12页
文件大小: 0K
描述: EVALUATION BOARD 2 ISL6844
标准包装: 1
主要目的: 特殊用途 DC/DC,以太网供电(POE)
输出及类型: 1,隔离
功率 - 输出: 11W
输出电压: 3.3V
电流 - 输出: 3.35A
输入电压: 36 ~ 57V
稳压器拓扑结构: 回扫
板类型: 完全填充
已供物品:
已用 IC / 零件: ISL6844
Application Note 1192
Primary MOSFET Selection
The primary MOSFET needs to be able to handle the peak
seen at minimum duty cycle (maximum input voltage). The
minimum and maximum duty cycle can be calculated by:
= 57 + [ 6 × ( 3.3 + 0.4 ) ] = 79.2V
? 3.3 - × 6 ?
? ------------------- × N ps ?
V inmax
? ?
? 57
?
D min = --------------------------------------------------------- = -------------------------------------- = 0.2578
V out
1 + ? -------- × 6 ?
1 + ? ------------------- × N ps ? ? 57 ?
V f
? 3.3 - × 6 ?
? ------------------ × N ps ?
? V inmin
?
? 36
?
D max = -------------------------------------------------------- = -------------------------------------- = 0.355
? V out
1 + ? -------- × 6 ?
1 + ? ------------------ × N ps ? ? 36 ?
V DSFET sec ondary = ------------- = ------------------ = 12.8V
voltage stress on the primary of a flyback design, given by:
V DSFETprimary = V DSFETprimary + [ N ps × ( V out + V f ) ]
(EQ. 1)
where
N ps = Turns ratio between the primary and the secondary
windings
V out = Output Voltage
= Forward drop across the diode (negligible in the case
of synchronous rectification)
As a good design practice, some margin is provided to this
peak stress voltage to accommodate transient spikes and for
a good reliable performance over time. Providing a 30%
design margin as a rule of thumb, the minimum rating on the
primary MOSFET needs to be 103V. HAT2088R-EL-E, a
? V out ?
-------
? ? 3.3
? V inmax ?
? V out ?
-------
? 3.3
? V inmin ?
The peak voltage can then be calculated by:
V out 3.3
D min
(EQ. 2)
(EQ. 3)
(EQ. 4)
Isp = ? ---------------------------- × --------------- × N ps ? + ? --------------------------------------- × --- ?
V inmin × η
D max
? ?
= ? -------------------------- × --------------- × 6 ? + ? ------------------------------------------------------------- × --- ?
155 × 10
× 200 × 10
200V part, was selected for the purpose, taking into account
also that this part has a very low capacitance and a very low
gate charge, key to keep the power losses to a minimum.
Rectification
Two versions of the evaluation board are available:
? A synchronous rectified output, with the converter
operating in the continuous current mode, to attain the
high efficiency target. This version is available as
ISL6844EVAL1Z. For this implementation, a discrete gate
drive circuit was designed, using a gate drive transformer
to meet isolation requirements.
? A conventionally rectified version, ISL6844EVAL2Z, is
also available for end users to whom tight regulation is not
critical, but emphasis is on cost saving at the expense of
slightly reduced efficiency. Since the feedback is tapped
off the primary auxiliary winding in this application, the
Providing a 30% design margin on similar grounds to the
primary FET selection, the minimum rating on the secondary
MOSFET is about 17V. To achieve the right balance
between the low r DS(ON) , to minimize conduction losses,
and low Q g , to minimize switching losses, HAT2168H-EL-E,
a 30V device was chosen.
Output Filter
The output capacitance needs to meet the ripple and noise
requirements, and also be able to handle the ripple current.
The peak secondary current can be approximately
calculated using the formula given in EQ. 5 below:
? V out × I out 1 ? V inmin × D max 1
? L × fsw 2 ?
3.3 × 3.35 1 36 × 0.355 1
? 36 × 0.87 0.355 ? ? – 6 3 2 ?
varying diode drop with load results in slightly lower
regulation. In the case of a synchronous rectified output,
the drop across the switching device is negligible. The
conventionally rectified version also operates in the
continuous current mode to maximize efficiency, and lower
the output ripple.
Secondary MOSFET Selection
The secondary MOSFET selection follows slightly different
criteria. The emphasis here is more to reduce the DC losses,
and hence a very low r DS(ON) device is required. At the
same time, care needs to be taken to ensure that the gate
charge required to drive the FET is not too large, as this may
need a beefy gate drive circuit. The peak voltage will be
2
= 6.2A
where
I sp = Peak Secondary Current
I sp = Efficiency of the Converter
f sw = Switching Frequency of the Converter
L = Magnetizing Inductance of the Transformer
(EQ. 5)
AN1192.3
March 12, 2007
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