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| 型号： | ISL76683AROZ-T7 |
| 厂商： | Intersil |
| 文件页数： | 12/17页 |
| 文件大小： | 0K |
| 描述： | DIGITAL LIGHT SENSOR ADC 6ODFN |
| 标准包装： | 1 |
| 带接近传感器： | 无 |
| 波长： | 540nm |
| 电源电压： | 2.5 V ~ 3.3 V |
| 输出类型： | I²C? |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-WDFN 裸露焊盘 |
| 包装： | 标准包装 |
| 其它名称： | ISL76683AROZ-T7DKR |
ISL76683
t int = i ( 1 ? 60Hz ) = j ( 1 ? 50Hz )
INTEGRATION TIME IN EXTERNAL TIMING MODE
This timing mode is programmed in the command register
00(hex) bit 5. External Timing Mode is recommended when
integration time can be synchronized to an external signal (such
as a PWM) to eliminate noise.
For Mode1 or Mode2 operation, the integration starts when the
sync_iic command is sent over the I 2 C lines. The device needs
two sync_iic commands to complete a photodiode conversion.
The integration then stops when another sync_iic command is
Solution 1
Using Internal Timing Mode
In order to achieve both 60Hz and 50Hz AC noise rejection, the
integration time needs to be adjusted to coincide with an integer
multiple of the AC noise cycle times.
(EQ. 14)
The first instance of integer values at which t int rejects both 60Hz
and 50Hz is when i = 6, and j = 5.
received. Writing a logic 1 to the sync_iic bit ends the current
ADC integration and starts another one.
t int = 6 ( 1 ? 60Hz ) = 5 ( 1 ? 50Hz )
(EQ. 15)
i I 2 C
t int = ----------
(EQ. 16)
100k Ω
(EQ. 17)
50k Ω
For Mode3, the operation is a sequential Mode1 and Mode2. The
device needs three sync_iic commands to complete two
photodiode measurements. The 1st sync_iic command starts the
conversion of the Diode1. The 2nd sync_iic completes the
conversion of Diode1 and starts the conversion of Diode2. The 3rd
sync_iic pulse ends the conversion of Diode2 and starts over again
to commence conversion of Diode1.
The integration time, t int , is determined by Equation 12:
(EQ. 12)
f I 2 C
i I2C is the number of I 2 C clock cycles to obtain the t int.
f I2C is the I 2 C operating frequency.
The internal oscillator, f OSC , operates identically in both the
internal and external timing modes, with the same dependence
on R EXT . However, in External Timing Mode, the number of clock
cycles per integration is no longer fixed at 2 n . The number of
clock cycles varies with the chosen integration time, and is
limited to 2 16 = 65,536. In order to avoid erroneous lux readings,
the integration time must be short enough not to allow an
t int = 100ms
Next, the Gain/Range needs to be determined. Based on the
application condition given, lux(max) = 500 lux, a range of 1000
lux is desirable. This corresponds to a Gain/Range Range1
mode. Also impose a resolution of n = 16-bit. Hence, we choose
Equation 10 to determine R EXT .
t int × 327kHz × 100 k Ω
n
R EXT = -------------------------------------------------------------
2
R EXT = 50k Ω
for Internal Timing Mode and Gain/Range is set to Range3 or Range4 only
The Full Scale Range, FSR, needs to be determined from
Equation 3:
FSR = 1000 lux ------------------
FSR = 2000 lux
The effective transfer function becomes:
t int < ------------------
E = ------------- × 2000 lux
2
overflow in the counter register.
65,535
f OSC
(EQ. 13)
data
16
(EQ. 18)
f OSC = 327kHz*100k Ω /R EXT . When Range/Gain is set to
Range1 or Range2.
TABLE 14. SOLUTION1 SUMMARY TO EXAMPLE DESIGN PROBLEM
DESIGN PARAMETER VALUE
E = ----------------- × 2000 lux
f OSC = 655kHz*100k Ω /R EXT . When Range/Gain is set to
Range3 or Range4.
Noise Rejection
In general, integrating type ADC’s have excellent noise-rejection
characteristics for periodic noise sources whose frequency is an
integer multiple of the integration time. For instance, a 60Hz AC
unwanted signal’s sum from 0ms to k*16.66ms (k = 1,2...k i ) is
zero. Similarly, setting the device’s integration time to be an
t int
R EXT
Gain/Range Mode
FSR
# of clock cycles
Transfer Function
100ms
50k Ω
Range1 = 1000 lux
2000 lux
2 16
DATA
16
2
integer multiple of the periodic noise signal greatly improves the
light sensor output signal in the presence of noise.
DESIGN EXAMPLE 1
The ISL76683 will be designed in a portable system. The
ambient light conditions that the device will be exposed to is at
most 500 lux, which is a good office lighting. The light source has
a 50/60Hz power line noise, which is not visible by the human
eye. The I 2 C clock is 10kHz.
Solution 2
Using External Timing Mode
From Solution 1, the desired integration time is 100ms. Note
that the R EXT resistor only determines the inter oscillator
frequency when using external timing mode. Instead, the
integration time is the time between two sync_iic commands
sent through the I 2 C. The programmer determines how many I 2 C
clock cycles to wait between two external timing commands.
i I2C = f I2C* t int = number of I 2 C clock cycles
12
FN7697.7
March 24, 2014
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