参数资料
| 型号： | ISL78310ARAJZ |
| 厂商： | Intersil |
| 文件页数： | 11/13页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ 1A 10DFN |
| 标准包装： | 100 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 0.8 V ~ 5 V |
| 输入电压： | 2.2 V ~ 6 V |
| 电压 - 压降（标准）： | 0.13V @ 1A |
| 稳压器数量： | 1 |
| 电流 - 输出： | 1A（最小值） |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-VFDFN 裸露焊盘 |
| 供应商设备封装： | 10-DFN（3x3） |
| 包装： | 管件 |
ISL78310
I INRUSH x0.5V
Equation 3 can be used to calculate C SS for a desired in-rush
current, where V OUT is the output voltage, C OUT is the total
capacitance on the output, and I INRUSH is the desired in-rush
current.
( V OUT xC OUT x2 μ A ) (EQ. 3)
C SS = --------------------------------------------------
The scopes in Figure 14 to 33 capture the response for the soft-
start function. The output voltage is set to 1.8V.
The external capacitor is always discharged to ground at the
beginning of start-up or enabling.
Power-Good Operation
The PGOOD is a logic output that indicates the status of V OUT .
The PGOOD flag is an open-drain NMOS that can sink 10mA
Heatsinking the DFN Package
The DFN package uses the copper area on the PCB as a heat-sink.
The EPAD of this package must be soldered to the copper plane
(GND plane) for heat sinking. Figure 17 shows a curve for the θ JA of
the DFN package for different copper area sizes.
46
44
42
40
38
36
during a fault condition. The PGOOD pin requires an external pull-
up resistor, which is typically connected to the VOUT pin. The
PGOOD pin should not be pulled up to a voltage source greater
than V IN . PGOOD goes low when the output voltage drops below
84% of the nominal output voltage or if the part is disabled. The
PGOOD comparator fuctions during current limit and thermal
shutdown. For applications not using this feature, connect this
34
2 4 6 8 10 12 14 16 18 20 22
EPAD-MOUNT COPPER LAND AREA ON PCB, mm 2
FIGURE 17. 3mmx3mm 10 LD DFN ON 4-LAYER PCB WITH
THERMAL VIAS θ JA vs EPAD-MOUNT COPPER LAND
AREA ON PCB
24
pin to ground.
Output Voltage Selection
An external resistor divider is used to scale the output voltage
relative to the internal reference voltage. This voltage is then fed
back to the error amplifier. The output voltage can be
programmed to any level between 0.8V and 5V. An external
resistor divider, R 1 and R 2 , is used to set the output voltage as
shown in Equation 4. The recommended value for R 2 is 500 Ω to
1k Ω. R 1 is then chosen according to Equation 5.
General PowerPAD Design
Considerations
Figure 18 shows the recommended use of vias on the thermal
pad to remove heat from the IC. This typical array populates the
thermal pad footprint with vias spaced three times the radius
distance from the center of each via. Small via size is advisable,
but not to the extent that solder reflow becomes difficult.
All vias should be connected to the pad potential, with low
V OUT = 0.5V × ? ?
? R 1 ?
? R 2
R 1 = R 2 × ? ------------- – 1 ?
------- + 1
?
V OUT
? 0.5V ?
(EQ. 4)
(EQ. 5)
thermal resistance for efficient heat transfer. Complete
connection of the plated-through hole to each plane is important.
It is not recommended to use “thermal relief” patterns to connect
the vias.
Power Dissipation
The junction temperature must not exceed the range specified in
the “Recommended Operating Conditions” on page 5. The power
dissipation can be calculated by using Equation 6:
P D = ( V IN – V OUT ) × I OUT + V IN × I GND
(EQ. 6)
The maximum allowed junction temperature, T J(MAX), and the
maximum expected ambient temperature, T A(MAX), will
determine the maximum allowable power dissipation, as shown
in Equation 7:
P D ( MAX ) = ( T J ( MAX ) – T A ) ? θ JA
θ JA is the junction-to-ambient thermal resistance.
(EQ. 7)
FIGURE 18. PCB VIA PATTERN
?
For safe operation, ensure that the power disspiation P D ,
calculated from Equation 6, is less than the maximum allowable
power dissipation P D(MAX) .
11
FN7810.1
December 23, 2013
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL78310ARAJZ-T | 功能描述:IC REG LDO ADJ 1A 10DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 稳压器拓扑结构:正，固定式或可调式 输出电压:3.3V，2.5 V ~ 11 V 输入电压:6.5 V ~ 45 V 电压 - 压降（标准）:0.9V @ 400mA 稳压器数量:1 电流 - 输出:400mA（最小） 电流 - 限制（最小）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-WQFN 裸露焊盘 供应商设备封装:16-TQFN-EP（5x5） 包装:带卷 (TR) |
| ISL78310ARAJZ-TR5303 | 制造商:Intersil Corporation 功能描述: 制造商:Intersil Corporation 功能描述:HIGH PERFORMANCE SINGLE 1A, ADJUSTABLE VOUT LDO - 3X3 10LD - Tape and Reel |
| ISL78322ARZ | 功能描述:IC REG BUCK SYNC ADJ DL 12-DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:两者兼有 输出数:1 输出电压:5V，1 V ~ 10 V 输入电压:3.5 V ~ 28 V PWM 型:电流模式 频率 - 开关:220kHz ~ 1MHz 电流 - 输出:600mA 同步整流器:无 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-SSOP（0.154"，3.90mm 宽） 包装:带卷 (TR) 供应商设备封装:16-QSOP |
| ISL78322ARZ-T | 功能描述:IC REG BUCK SYNC ADJ DL 12-DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:两者兼有 输出数:1 输出电压:5V，1 V ~ 10 V 输入电压:3.5 V ~ 28 V PWM 型:电流模式 频率 - 开关:220kHz ~ 1MHz 电流 - 输出:600mA 同步整流器:无 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-SSOP（0.154"，3.90mm 宽） 包装:带卷 (TR) 供应商设备封装:16-QSOP |
| ISL78322ARZ-TR5303 | 制造商:Intersil Corporation 功能描述: |
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