参数资料
| 型号： | ISL78310ARAJZ |
| 厂商： | Intersil |
| 文件页数： | 9/13页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ 1A 10DFN |
| 标准包装： | 100 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 0.8 V ~ 5 V |
| 输入电压： | 2.2 V ~ 6 V |
| 电压 - 压降（标准）： | 0.13V @ 1A |
| 稳压器数量： | 1 |
| 电流 - 输出： | 1A（最小值） |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-VFDFN 裸露焊盘 |
| 供应商设备封装： | 10-DFN（3x3） |
| 包装： | 管件 |
ISL78310
Applications Information
Input Voltage Requirements
This zero increases the crossover frequency of the LDO and
provides additional phase resulting in faster load transient
response.
ISL78310 is capable of delivering output voltages from 0.8V to
5.0V. Due to the nature of an LDO, V IN must be some margin
higher than the output voltage plus dropout at the maximum
V IN
V OUT
rated current of the application if active filtering (PSRR) is
expected from V IN to V OUT . The generous dropout specification of
this family of LDOs allows applications to design for a level of
efficiency that can accommodate profiles smaller than the
TO220/263.
EN
C IN
ISL78310
PG
ADJ
R TOP
C PB
C OUT
External Capacitor Requirements
GENERAL GUIDELINE
External capacitors are required for proper operation. Careful
attention must be paid to layout guidelines and selection of
SS
R BOTTOM
capacitor type and value to ensure optimal performance.
OUTPUT CAPACITOR
The ISL78310 applies state-of-the-art internal compensation to
keep the selection of the output capacitor simple for the
customer. Stable operation over full temperation, V IN range, V OUT
range and load extremes are guaranteed for all capacitor types
and values assuming a minimum of 10μF X5R/X7R is used for
local bypass on V OUT . This output capacitor must be connected to
the V OUT and GND pins of the LDO with PCB traces no longer than
0.5cm. Additional capacitors of any value in ceramic, POSCAP,
alum/tantalum electrolytic types may be placed in parallel to
improve PSRR at higher frequencies and/or load transient AC
output voltage tolerances.
FIGURE 13.
It is also important to note that the LDO stability and load transient
are affected by the type of output capacitor used. For optimal
result, empirical tuning of C PB is suggested for each specific
application. It is recommended to not use C PB when high ESR
capacitors such as Aluminum Electrolytic or Tantalum are used.
Table 1 shows the recommended C PB, R TOP , R BOTTOM and C PB
values for different output voltage rails.
TABLE 1.
V OUT R TOP R BOTTOM C PB C OUT
(V) (k ? ) ( ? ) (pF) (μF)
INPUT CAPACITOR
For proper operation, a minimum capacitance of 10μF X5R/X7R
is required at the input. This ceramic input capacitor must be
connected to V IN and GND pins of the LDO with PCB traces no
longer than 0.5cm.
Phase Boost Capacitor (C PB )
A small phase boost capacitor, CPB, can be placed across the top
resistor in the feedback resistor divider network (Figure 13
below) in order to place a zero at:
5.0
3.3
2.5
1.8
1.5*
1.5
1.2*
1.2*
1.0
2.61
2.61
2.61
2.61
2.61
2.61
2.61
2.61
2.61
287
464
649
1.0k
1.3k
1.3k
1.87k
1.87k
2.61k
100
100
82
82
68
150
120
270
220
10
10
10
10
10
22
22
47
47
F Z = 1 ? ( 2 ? pi ? R TOP ? C PB )
(EQ. 1)
0.8
2.61
4.32k
220
47
*Either option could be used, depending on cost/performance
requirements.
Thermal Fault Protection
In the event the die temperature exceeds typically +160°C, then
the output of the LDO shuts down until the die temperature cools
down to typically +130°C. The level of power, combined with the
thermal resistance of the package (+48°C/W for DFN),
determines whether the junction temperature exceeds the
thermal shutdown temperature specified in the “Electrical
Specifications” table on page 5 (see thermal packaging
guidelines).
9
FN7810.1
December 23, 2013
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL78310ARAJZ-T | 功能描述:IC REG LDO ADJ 1A 10DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 稳压器拓扑结构:正，固定式或可调式 输出电压:3.3V，2.5 V ~ 11 V 输入电压:6.5 V ~ 45 V 电压 - 压降（标准）:0.9V @ 400mA 稳压器数量:1 电流 - 输出:400mA（最小） 电流 - 限制（最小）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-WQFN 裸露焊盘 供应商设备封装:16-TQFN-EP（5x5） 包装:带卷 (TR) |
| ISL78310ARAJZ-TR5303 | 制造商:Intersil Corporation 功能描述: 制造商:Intersil Corporation 功能描述:HIGH PERFORMANCE SINGLE 1A, ADJUSTABLE VOUT LDO - 3X3 10LD - Tape and Reel |
| ISL78322ARZ | 功能描述:IC REG BUCK SYNC ADJ DL 12-DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:两者兼有 输出数:1 输出电压:5V，1 V ~ 10 V 输入电压:3.5 V ~ 28 V PWM 型:电流模式 频率 - 开关:220kHz ~ 1MHz 电流 - 输出:600mA 同步整流器:无 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-SSOP（0.154"，3.90mm 宽） 包装:带卷 (TR) 供应商设备封装:16-QSOP |
| ISL78322ARZ-T | 功能描述:IC REG BUCK SYNC ADJ DL 12-DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:两者兼有 输出数:1 输出电压:5V，1 V ~ 10 V 输入电压:3.5 V ~ 28 V PWM 型:电流模式 频率 - 开关:220kHz ~ 1MHz 电流 - 输出:600mA 同步整流器:无 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-SSOP（0.154"，3.90mm 宽） 包装:带卷 (TR) 供应商设备封装:16-QSOP |
| ISL78322ARZ-TR5303 | 制造商:Intersil Corporation 功能描述: |
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