- 您现在的位置：买卖IC网 > PDF目录14647 > ISL8014IRZ-T (Intersil)IC REG BUCK SYNC ADJ 4A 16QFN PDF资料下载
参数资料
| 型号： | ISL8014IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 13/16页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 4A 16QFN |
| 产品培训模块： | ISL8013/4 Synchronous Buck Regulators |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 5.5 V |
| 输入电压： | 2.7 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1MHz |
| 电流 - 输出： | 4A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-VQFN 裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 16-QFN（4x4） |
| 产品目录页面： | 1248 (CN2011-ZH PDF) |
| 其它名称： | ISL8014IRZ-TDKR |
ISL8014
Short-Circuit Protection
The short-circuit protection SCP comparator monitors the
VFB pin voltage for output short-circuit protection. When
VIN
the VFB is lower than 0.2V, the SCP comparator forces
the PWM oscillator frequency to drop to 1/3 of the normal
operation value. This comparator is effective during
start-up or an output short-circuit event.
PG
2.5V
T
EN
<400mV
t (TIME)
R 5 ? ( V IN – 1.4V )
R 4 = ---------------------------------------------
C ≥ --------------------
2 ? T
R 4 || R 5
During power-up, the open-drain power good output
holds low for about 1ms after V OUT reaches the
regulation voltage. The PG output also serves as a 1ms
delayed the Power Good signal when the pull-up resistor
R 1 is installed.
Soft Start-Up
The soft-start-up reduces the inrush current during the
start-up. The soft-start block outputs a ramp reference to
the input of the error amplifier. This voltage ramp limits
the inductor current as well as the output voltage speed
so that the output voltage rises in a controlled fashion.
When VFB is less than 0.2V at the beginning of the
soft-start, the switching frequency is reduced to 1/3 of
the nominal value so that the output can start up
smoothly at light load condition. During soft-start, the IC
operates in the SKIP mode to support pre-biased output
condition.
UVLO
When the input voltage is below the undervoltage lock-
out (UVLO) threshold, the regulator is disabled. To adjust
the voltage level of power on and UVLO, use a resistive
divider across EN. The input voltage programming
resistor R 4 will depend on on the bottom resistor R 5 , as
referred to in Figure 38. The value of R 5 is typically
between 10k Ω and 100k Ω .
V IN
FIGURE 39. CIRCUIT IMPLEMENTATION WITH V IN
SLEW RATE
Let T equal the rise time of V IN . Select the ratio of R 5 and
R 4 such that the voltage is 1.4V (minimum enable logic
high threshold) when V IN is equal to or greater than
2.5V. Set R 5 between 10k Ω to 100k Ω , and use Equation 1
to determine R 4 :
(EQ. 1)
1.4V
Where V IN is greater than or equal to 2.5V.
Then select C such that the equivalent time constant is at
least 2x the rise time, T. This will delay the EN voltage
enough so that the overall EN voltage is less than 400mV
by the time V IN reaches 2.5V. Use Equation 2 to get C:
(EQ. 2)
Where T is the rise time of V IN
As an example, let V IN = 5V with rise time, T = 10ms.
Then R 4 = 56.2k Ω , R 5 = 71.5k Ω , and C = 0.68μF are
used to insure that V IN was >2.5V and the EN voltage
was <400mV.
Discharge Mode (Soft-Stop)
When a transition to shutdown mode occurs or the VIN
UVLO is set, the outputs discharge to GND through an
EN
R4
internal 100 Ω switch.
Power MOSFETs
1V
R5
C
The power MOSFETs are optimized for best efficiency.
The ON-resistance for the P-MOSFET is typically 50m Ω
and the ON-resistance for the N-MOSFET is typically
50m Ω .
FIGURE 38. EXTERNAL RESISTOR DIVIDER
Enable
The enable (EN) input allows the user to control the
turning on or off the regulator for purposes such as
power-up sequencing. When the regulator is enabled,
there is typically a 600μs delay for waking up the
bandgap reference and then the soft-start-up begins. It
is recommended that the EN voltage should be kept logic
low (less than 400mV), until V IN reaches 2.5V. Refer to
Figures 38 and 39 for suggested circuit implementation
with V IN slew rate.
13
100% Duty Cycle
The ISL8014 features 100% duty cycle operation to
maximize the battery life. When the battery voltage
drops to a level that the ISL8014 can no longer maintain
the regulation at the output, the regulator completely
turns on the P-MOSFET. The maximum dropout voltage
under the 100% duty-cycle operation is the product of
the load current and the ON-resistance of the P-MOSFET.
FN6576.4
November 23, 2009
相关PDF资料 |
PDF描述 |
|---|---|
| HBC20DREH-S734 | CONN EDGECARD 40POS .100 EYELET |
| GSC28DRXN-S734 | CONN EDGECARD 56POS DIP .100 SLD |
| GSC26DRXI-S734 | CONN EDGECARD 52POS DIP .100 SLD |
| VI-J52-CY | CONVERTER MOD DC/DC 15V 50W |
| VI-J51-CZ-S | CONVERTER MOD DC/DC 12V 25W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL8014IRZ-TS2715 | 制造商:Intersil Corporation 功能描述:S SPEC FOR TRACKING BROADCOM BUSINESS ONLY-SOLD THRU DISTI - Tape and Reel |
| ISL8016 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:6A Low Quiescent Current High Efficiency Synchronous Buck Regulator |
| ISL8016_1105 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:6A Low Quiescent Current High Efficiency Synchronous Buck Regulator |
| ISL8016CIR1EVAL1Z | 功能描述:EVAL BOARD 1 FOR ISL8016CIR RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 标准包装:1 系列:- 主要目的:DC/DC，步降 输出及类型:1，非隔离 功率 - 输出:- 输出电压:3.3V 电流 - 输出:3A 输入电压:4.5 V ~ 28 V 稳压器拓扑结构:降压 频率 - 开关:250kHz 板类型:完全填充 已供物品:板 已用 IC / 零件:L7981 其它名称:497-12113STEVAL-ISA094V1-ND |
| ISL8016IR12Z | 功能描述:IC REG BUCK SYNC 1.2V 6A 20QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:两者兼有 输出数:1 输出电压:5V，1 V ~ 10 V 输入电压:3.5 V ~ 28 V PWM 型:电流模式 频率 - 开关:220kHz ~ 1MHz 电流 - 输出:600mA 同步整流器:无 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-SSOP（0.154"，3.90mm 宽） 包装:带卷 (TR) 供应商设备封装:16-QSOP |
发布紧急采购，3分钟左右您将得到回复。