参数资料
型号: ISL8106CRZ-T
厂商: Intersil
文件页数: 9/15页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 16-QFN
标准包装: 6,000
系列: Robust Ripple Regulator™ (R³)
PWM 型: 电压模式
输出数: 1
频率 - 最大: 600kHz
电源电压: 7 V ~ 25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 16-VQFN 裸露焊盘
包装: 带卷 (TR)
ISL8106
MOSFET Gate-Drivers
The ISL8106 has internal gate-drivers for the top-side and
bottom-side N-Channel MOSFETs. The bottom-side gate-
driver is optimized for low duty-cycle applications where the
bottom-side MOSFET conduction losses are dominant,
requiring a low r DS(on) MOSFET. The BGATE pulldown
resistance is small in order to clamp the gate of the MOSFET
below the V GS(th) at turnoff. The current transient through
the gate at turnoff can be considerable because the
switching charge of a low r DS(on) MOSFET can be large.
Both drivers incorporate bottom-side MOSFETS from
conducting simultaneously and shorting the input supply.
During turn-off of the bottom-side MOSFET, the BGATE to
PGND voltage is monitored until it reaches a 1V threshold, at
which time the TGATE driver is allowed to switch. During
turn-off of the top-side MOSFET, the TGATE to LX voltage is
monitored until it reaches a 1V threshold, at which time the
BGATE driver is allowed to switch.
The input power for the BGATE driver circuit is sourced
directly from the PVCC pin. The input power for the TGATE
driver circuit is sourced from a “boot” capacitor connected
from the BOOT pin to the LX pin. The boot capacitor is
charged from a 5V bias supply through a internal Schottky
diode each time the bottom-side MOSFET turns on.
rectifier, switching the bottom-side MOSFET regardless of
the polarity of the output inductor current. In DEM, the
bottom-side MOSFET is disabled during negative current
flow from the output inductor. DEM is permitted when the
FCCM pin is pulled low, and disabled when pulled high.
When DEM is permitted, the converter will automatically
select FCCM or DEM according to load conditions. If positive
LX pin voltage is measured for eight consecutive PWM
pulses, then the converter will enter diode-emulation mode
on the next PWM cycle. If a negative LX pin voltage is
measured, the converter will exit DEM on the following PWM
pulse. An audio filter is incorporated into the PWM
generation circuitry that prevents the switching frequency
from entering the audible spectrum at low load conditions.
Overcurrent and Short-Circuit Protection
When an OCP or SCP fault is detected, the ISL8106
overcurrent and short-circuit protection circuit will pull the
PGOOD pin low and latch off the converter. The fault will
remain latched until the EN pin is pulled below V ENF or if the
voltage at the VIN pin is reduced to the extent that V CC has
fallen below the POR V CCF threshold. Selecting the
appropriate value of resistor R BSOC that is connected from
the BSOC pin to the drain terminal of the bottom-side
MOSFET to programs the OCP threshold.
The OCP circuit measures positive-flowing, peak-current
through the output inductor, not the DC current flowing from
the converter to the load. The bottom-side MOSFET drain
current is assumed to be equal to the positive output
TGATE
BGATE
t BGFTGR
t TGFBGR
50%
50%
inductor current when the top-side MOSFET is turn off.
Current briefly conducts through the bottom-side MOSFET
body diode until the BGATE driver goes high. The peak
inductor current develops a voltage across the r DS(ON) of
the bottom-side MOSFET just as if it were a discrete current-
sense resistor. An OCP fault will occur when the BSOC pin
has measured more than the OCP threshold current I OC, on
consecutive PWM pulses, for a period exceeding 20μs. It
FIGURE 3. GATE DRIVE TIMING DIAGRAM
Diode Emulation
Positive inductor current can flow from the source of the top-
side MOSFET or from the drain of the bottom-side MOSFET.
Negative inductor current flows into the drain of the bottom-
side MOSFET. When the bottom-side MOSFET conducts
does not matter how many PWM pulses are measured
during the 20μs period. If a measurement falls below I OC
before 20μs has elapsed, then the timer is reset to zero. An
SCP fault will occur when the BSOC pin has measured more
than the short-circuit threshold current I SC, in less than
10μs, on consecutive PWM pulses. The relationship
between I D and I BSOC can be written as:
I FL + --------- ? OC SP ? r DS ( ON )
R BSOC = ----------------------------------------------------------------------------
positive inductor current, the LX voltage will be negative with
respect to the GND pin. Conversely, when the bottom-side
MOSFET conducts negative inductor current, the LX voltage
will be positive with respect to the GND pin. Negative
inductor current occurs when the output load current is less
than ? the inductor ripple current.
The ISL8106 can be configured to operate in forced-
continuous-conduction-mode (FCCM) or in diode-emulation-
mode (DEM), which can improve light-load efficiency. In
FCCM, the controller always operates as a synchronous
9
I BSOC ? R BSOC = I D ? r DS ( ON )
The value of R BSOC can then be written as:
I PP
2
I OC
(EQ. 3)
(EQ. 4)
FN9283.1
November 10, 2006
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