参数资料
型号: ISL83386EIV-T
厂商: Intersil
文件页数: 7/10页
文件大小: 0K
描述: IC 3DRVR/2RCVR RS232 3V 20-TSSOP
标准包装: 2,500
类型: 收发器
驱动器/接收器数: 3/2
规程: RS232
电源电压: 3 V ~ 5.5 V
安装类型: 表面贴装
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 20-TSSOP
包装: 带卷 (TR)
6
FN6034.1
November 19, 2004
(there are no pull-up resistors), and may cause ICC
increases. Connect unused inputs to GND for the best
performance.
Receivers
The ISL83386E contains standard inverting receivers that
convert RS-232 signals to CMOS output levels and accept
inputs up to
±25V while presenting the required 3k to 7k
input impedance (see Figure 1) even if the power is off
(VCC = 0V). The receivers’ Schmitt trigger input stage uses
hysteresis to increase noise immunity and decrease errors
due to slow input signal transitions. Receiver outputs swing
from GND to VL, and tristate in powerdown.
Low Power Operation
This 3V device requires a nominal supply current of 0.3mA,
even at VCC = 5.5V, during normal operation (not in
powerdown mode). This is considerably less than the 11mA
current required by comparable 5V RS-232 devices, allowing
users to reduce system power simply by replacing the old
style device with the ISL83386E in new designs.
Powerdown Functionality
The already low current requirement drops significantly
when the device enters powerdown mode. In powerdown,
supply current drops to 1
A, because the on-chip charge
pump turns off (V+ collapses to VCC, V- collapses to GND),
and the transmitter and receiver outputs tristate. This micro-
power mode makes these devices ideal for battery powered
and portable applications.
Software Controlled (Manual) Powerdown
The ISL83386E may be forced into its low power, standby
state via a simple shutdown (SHDN) pin (see Figure 2).
Driving this pin high enables normal operation, while driving
it low forces the IC into its powerdown state. The time
required to exit powerdown, and resume transmission is less
than 100
s. Connect SHDN to VCC if the powerdown
function isn’t needed.
VL Logic Supply Input
Unlike other RS-232 interface devices where the CMOS
outputs swing between 0 and VCC, the ISL83386E features
a separate logic supply input (VL; 1.8V to 5V, regardless of
VCC) that sets VOH for the receiver outputs. Connecting VL
to a host logic supply lower than VCC, prevents the
ISL83386E outputs from forward biasing the input diodes of
a logic device powered by that lower supply. Connecting VL
to a logic supply greater than VCC ensures that the receiver
output levels are compatible even with the CMOS input VIH
of AC, HC, and CD4000 devices. Note that the VL supply
current increases to 100
A with V
L = 5V and VCC =3.3V
(see Figure 11). VL also powers the transmitter and logic
inputs, thereby setting their switching thresholds to levels
compatible with the logic supply. This separate logic supply
pin allows a great deal of flexibility in interfacing to systems
with different logic supplies. If logic translation isn’t required,
connect VL to the ISL83386E VCC.
Capacitor Selection
The ISL83386E charge pumps only require 0.1
F capacitors
for the full operational voltage range. Table 3 lists other
acceptable capacitor values for various supply voltage
ranges. Do not use values smaller than those listed in Table
3. Increasing the capacitor values (by a factor of 2) reduces
ripple on the transmitter outputs and slightly reduces power
consumption.
TABLE 2. POWERDOWN TRUTH TABLE
SHDN
INPUT
TRANSMITTER
OUTPUTS
RECEIVER
OUTPUTS
MODE OF OPERATION
L
High-Z
Manual Powerdown
H
Active
Normal Operation
RXOUT
GND
≤ VROUT ≤ VL
5k
RXIN
-25V
≤ VRIN ≤ +25V
GND
VL
FIGURE 1. RECEIVER CONNECTIONS
TABLE 3. REQUIRED CAPACITOR VALUES
VCC
(V)
C1
(
F)
C2, C3, C4
(
F)
3.0 to 3.6
0.1
4.5 to 5.5
0.047
0.33
3.0 to 5.5
0.22
1
FIGURE 2. CONNECTIONS FOR MANUAL POWERDOWN
PWR
SHDN
CPU
I/O
ISL83386E
MGT
LOGIC
UART
VL
I/O CHIP
POWER SUPPLY
VCC
ISL83386E
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