参数资料
型号: ISL84782IRZ
厂商: Intersil
文件页数: 8/12页
文件大小: 0K
描述: IC MUX/DEMUX DUAL 4X1 16TQFN
标准包装: 100
功能: 多路复用器/多路分解器
电路: 2 x 4:1
导通状态电阻: 750 毫欧
电压电源: 单电源
电压 - 电源,单路/双路(±): 1.6 V ~ 3.6 V
电流 - 电源: 50nA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-WFQFN 裸露焊盘
供应商设备封装: 16-QFN-EP(3x3)
包装: 管件
5
FN6097.3
November 17, 2004
Inhibit Turn-OFF Time, tOFF
V+ = 1.8V, VAx or VBx = 1.0V, RL = 50, CL = 35pF,
(See Figure 1, Note 10)
25
-
16
25
ns
Full
-
27
ns
Address Transition Time, tTRANS
V+ = 1.8V, VAX or VBX = 1.0V, RL = 50, CL = 35pF,
(See Figure 1, Note 10)
25
-
25
34
ns
Full
-
36
ns
Break-Before-Make Time, tBBM
V+ = 1.8V, VAX or VBX = 1.0V, RL = 50, CL = 35pF,
(See Figure 3, Note 10)
25
-
9
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0, (See Figure 2)
25
-
-39
-
pC
Test Circuits and Waveforms
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. INHIBIT tON/tOFF MEASUREMENT POINTS
Repeat test for other switches. CL includes fixture and stray
capacitance.
FIGURE 1B. INHIBIT tON/tOFF TEST CIRCUIT
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1C. ADDRESS tTRANS MEASUREMENT POINTS
Repeat test for other switches. CL includes fixture and stray
capacitance.
FIGURE 1D. ADDRESS tTRANS TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
Electrical Specifications: 1.8V Supply Test Conditions: V+ = +1.8V, GND = 0V, VINH = 1V, VINL = 0.4V (Notes 4, 8),
Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
(NOTE 5)
TYP
MAX
(NOTE 5) UNITS
50%
tr < 5ns
tf < 5ns
tON
V+
0V
tOFF
LOGIC
INPUT
SWITCH
OUTPUT
90%
0V
90%
VOUT
VA0, VB0
VOUT
V(NO or NC)
RL
RL R ON
()
+
------------------------------
=
LOGIC
INPUT
VOUT
RL
COMA
A0, B0
INH
50
35pF
GND
A1,A2,B1,
CL
V+
ADD0-1
C
V+
C
B2,A3,B3
COMB
50%
tr < 5ns
tf < 5ns
tTRANS
90%
V+
VA3, VB3
0V
tTRANS
LOGIC
INPUT
SWITCH
OUTPUT
10%
VOUT
VA0, VB0
0V
VOUT
V(NO or NC)
RL
RL R ON
()
+
------------------------------
=
LOGIC
INPUT
VOUT
RL
COMA,
A0, B0
ADD0-1
50
35pF
GND
A1,A2,B1,
CL
V+
INH
C
V+
C
B2,A3,B3
COMB
ISL84782
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