参数资料
型号: ISL85033DUALEVAL1Z
厂商: Intersil
文件页数: 24/26页
文件大小: 0K
描述: EVAL BOARD 1 FOR ISL85033
标准包装: 1
系列: *
ISL85033
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest Rev.
DATE
REVISION
CHANGE
11/2/11
10/7/11
9/14/11
8/9/11
4/5/11
FN6676.6 In the “Pin Descriptions” on page 2, added the following to end of EN1, EN2 description:
"If EN1, EN2 pins are driven by an external signal, the minimum off-time for EN1, EN2 should be:
EN_T_off ( μ s ) = 10 μ s ? C SS ? 2.2nF
where CSS is the soft-start pin capacitor (nF). ISL85033 does not have debouncing to EN1, EN2 external signals."
In “Enable and Disable” on page 16, adding the following:
"If EN1, EN2 pins are driven by an external signal, the minimum off-time for EN1, EN2 should be:
EN_T_off ( μ s ) = 10 μ s ? C SS ? 2.2nF
where CSS is the soft-start pin capacitor (nF). ISL85033 does not have debouncing to EN1, EN2 external signals."
Adding the following after Equation 3 on page 16:
"Maximum Css value is 50nF".
In the “Pin Descriptions” on page 2, added the following to the end of SS1, SS2 description:
"Maximum Css value is 50nF".
FN6676.5 In “Absolute Maximum Ratings” on page 8, changed:
PHASE1/2 to GND . . . . .-0.3V to +33V
to:
PHASE1/2 to GND . . . . .-7V (<10ns) /-0.3V (DC) to +33V
FN6676.4 In the “Pin Descriptions” on page 3, for “SYNCIN”, replaced “Set the internal switching frequency 20% lower than the external
SYNC frequency applied to the SYNCIN pin" with "External SYNC frequency applied to the SYNCIN pin should be at least 2.4
times the internal switching frequency setting"
On page 8, changed parameter name from “Syncronization Frequency” to “Switching Frequency”.
FN6676.3 Converted to new template
Updated Intersil Trademark statement at bottom of page 1 per directive from Legal.
Page 2 in the pin table definition, please add the following sentence to the Pin 11 (VCC) description after “Output of the internal
5V linear regulator. Decouple to PGND with a minimum of 4.7 μ F ceramic capacitor.”
“This pin is provided only for internal bias of ISL85033 (not to be loaded with current over 10mA).”
Page 8 all Absolute Max Ratings that are “5.5” should be changed to “5.9”
10/15/10 FN6676.2 Added the following sentence to the “SYNCIN” description in the “Pin Descriptions” table on page 3:
“Set the internal switching frequency 20% lower than the external SYNC frequency applied to the SYNCIN pin.”
Added the following sentence to “Synchronization Control” on page 18: “The switching frequency for each output is half of the
SYNCIN frequency.”
Revised tape and reel note in “Ordering Information” on page 6 from:
“Add “-T” suffix for Tape and Reel. Please refer to TB347 for details on reel specifications”
to:
“Add “-T*” suffix for Tape and Reel. Please refer to TB347 for details on reel specifications”
This is in order to delineate all tape and reel options.
R 3 = -------------------------------
9/14/10
6/21/10
6/18/10
Corrected Eq. 2 on page 16 from:
R 2 x0.8V
V OUT – 0.8V
to:
R 2 = ( V OUT – 0.8 ) ? R 3 ? 0.8
Revised preceding paragraph from:
“The output voltage programming resistor, R 3 , depends on the value chosen for the feedback resistor, R 2 , and the desired
output voltage, V OUT , of the regulator. Equation 2 describes the relationship between V OUT and resistor values. R 2 is often
chosen to be in the 1k ? to 10k ? range.”
to:
“The output voltage programming resistor, R 2 , depends on the value chosen for the feedback resistor, R 3 , and the desired
output voltage, V OUT , of the regulator. Equation 2 describes the relationship between V OUT and resistor values. R 3 is often
chosen to be in the 1k ? to 10k ? range.”
FN6676.1 Changed MIN/MAX for “Soft-Start Charging Current” on page 8 from 1.5/2.5μA to 1.4/2.6μA
FN6676.0 Initial Release.
24
FN6676.6
February 23, 2012
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