参数资料
| 型号： | ISL85033IRTZ |
| 厂商： | Intersil |
| 文件页数： | 20/26页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 3A 28TQFN |
| 标准包装： | 75 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.8 V ~ 28 V |
| 输入电压： | 4.5 V ~ 28 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 300kHz ~ 2MHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 28-TQFN（4x4） |
IS L 8 5 0 3 3
where Io [A] is the output load current, R 1 ( ? ) and Rc ( ? ) is the
ESR of the output capacitor Co.
CURRENT SAMPLING TRANSFER FUNCTION H e (S)
In current loop, the current signal is sampled every switching
S
S
H e ( S ) = ------- + -------------- + 1
ω n Q n
ω n
Example: V o = 5V, I o = 3A, f s = 500kHz, f c = 50kHz,
C o = 47μF/R c = 5m ? , then the compensation resistance
R 1 = 96k ? .
The compensation capacitors are:
cycle. Equation 16 shows the transfer function:
2
2
(EQ. 16)
Where Q n and ω n are given by Q n = – -- π - , = ω n = π f s .
^ i
^
L
i L
IL d ^
^ V IN d^
V IN
+
R T
1 + ------------
v o ω esr (EQ. 17)
F 1 ( S ) = ------ = V in --------------------------------------
d ?
------- + -------------- + 1
ω o Q p
ω o
1
1
Where ω esr = ------------- , Q p ≈ R o ----- o - , ω o = --------------
R c C o
LC o
1 + ------
F 2 ( S ) = --- ? - = ------------------- --------------------------------------
R o + R L
(EQ. 18)
d
S
S
ω o Q p
------- + -------------- + 1
ω o
C 1 = 815pF, C 2 = 2.5pF (There is approximately 3pF parasitic
capacitance from V COMP to GND; therefore, C 2 is optional).
Theory of Compensation
The sensed current signal is injected into the voltage loop to
achieve current mode control to simplify the loop compensation
design. The inductor is not considered as a state variable for
current mode control and the system becomes a single order
system. It is much easier to design a compensator to stabilize the
voltage loop than voltage mode control. Figure 46 shows the
small signal model of the synchronous buck regulator.
^
IN V O
1:D
Rc
Ro
Co
2
Power Stage Transfer Functions
Transfer function F 1 (S) from control to output voltage is
calculated in Equation 17:
S
S S
2
C
L
Transfer function F 2 (S) from control to inductor current is given
by Equation 18:
S
I
? o V in ω z
2
2
Where ω z = ------------- .
d ^
Fm
T i (S)
K
1
R o C o
Current loop gain T i (S) is expressed as Equation 19:
+
He(S)
T v (S)
T i ( S ) = R T F m F 2 ( S ) H e ( S )
(EQ. 19)
V COMP
^
-Av(S)
The voltage loop gain with open current loop is calculated in
Equation 20:
FIGURE 46. SMALL SIGNAL MODEL OF SYNCHRONOUS BUCK
REGULATOR
T v ( S ) = KF m F 1 ( S ) A v ( S )
(EQ. 20)
d 1
F m = ---------------- = ------------------------------
( S e + S n ) T s
L v ( S ) = -----------------------
V FB
K = --------- , V
Where
is the feedback voltage of the voltage
V o
PWM Comparator Gain F m
The PWM comparator gain F m for peak current mode control is
given by Equation 14:
(EQ. 14)
v ? comp
Where S e is the slew rate of the slope compensation and S n is
given by Equation 15.
The voltage loop gain with current loop closed is given by
Equation 21:
T v ( S ) (EQ. 21)
1 + T i ( S )
FB
error amplifier. If T i (S)>>1, then Equation 21 can be simplified as
shown in Equation 22:
1 + ------------
L v ( S ) = --------- ------------------- ---------------------- --------------- , ω p ≈ -------------
L
V in – V o
S n = R t --------------------
Where:
(EQ. 15)
S
V FB R o + R L ω esr A v ( S ) 1
S
V o R T 1 + ------- H e ( S ) R o C o
ω p
(EQ. 22)
R T is trans-resistance, and is the product of the current sensing
resistance and gain of the current amplifier in current loop.
20
From Equation 22, it is shown that the system is a single order
system, which has a single pole located at ω P before the half
switching frequency. Therefore, a simple type II compensator can
be easily used to stabilize the system.
FN6676.6
February 23, 2012
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