参数资料
| 型号： | ISL8540IVEZ-T |
| 厂商： | Intersil |
| 文件页数： | 16/16页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 2A 20HTSSOP |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1.21 V ~ 35 V |
| 输入电压： | 9 V ~ 40 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 100kHz ~ 600kHz |
| 电流 - 输出： | 2A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽）裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 20-TSSOP-EP |
ISL8540
HTSSOP (Heat-Sink TSSOP) Family
0.25 M C A B
N
D
(N/2)+1
A
MDP0048
HTSSOP (HEAT-SINK TSSOP) FAMILY
MILLIMETERS
SYMBOL 14 LD 20 LD 24 LD 28 LD 38 LD TOLERANCE
E
E1
PIN #1 I.D.
A
1.20
1.20
1.20
1.20
1.20
Max
A1
A2
0.075
0.90
0.075
0.90
0.075
0.90
0.075
0.90
0.075
0.90
±0.075
+0.15/-0.10
B
1
TOP VIEW
(N/2)
0.20 C B A
2X
N/2 LEAD TIPS
b
c
0.25
0.15
0.25
0.15
0.25
0.15
0.25
0.15
0.22
0.15
+0.05/-0.06
+0.05/-0.06
D
5.00
6.50
7.80
9.70
9.70
±0.10
EXPOSED
THERMAL PAD
D1
E2
D1
E
E1
E2
e
L
L1
N
3.2
6.40
4.40
3.0
0.65
0.60
1.00
14
4.2
6.40
4.40
3.0
0.65
0.60
1.00
20
4.3
6.40
4.40
3.0
0.65
0.60
1.00
24
5.0
6.40
4.40
3.0
0.65
0.60
1.00
28
7.25
6.40
4.40
3.0
0.50
0.60
1.00
38
Reference
Basic
±0.10
Reference
Basic
±0.15
Reference
Reference
BOTTOM VIEW
Rev. 3 2/07
NOTES:
1. Dimension “D” does not include mold flash, protrusions or gate
C
e
0.05
H
burrs. Mold flash, protrusions or gate burrs shall not exceed
0.15mm per side.
2. Dimension “E1” does not include interlead flash or protrusions.
SEATING
PLANE
Interlead flash and protrusions shall not exceed 0.25mm per
side.
0.10 C
N LEADS
b
SIDE VIEW
0.10 M C A B
3. Dimensions “D” and “E1” are measured at Datum Plane H.
4. Dimensioning and tolerancing per ASME Y14.5M - 1994.
SEE DETAIL “X”
A A2
END VIEW
L1
GAUGE
PLANE
0.25
c
A1
L
0° - 8°
DETAIL X
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
16
FN6495.5
September 9, 2008
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