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参数资料
| 型号： | ISL8724IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 12/14页 |
| 文件大小： | 0K |
| 描述： | IC POWER SUPPLY SEQUENCER 24QFN |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 6,000 |
| 应用： | 电源序列发生器 |
| 电源电压： | 2.5 V ~ 5 V |
| 电流 - 电源： | 270µA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-VFQFN 裸露焊盘 |
| 供应商设备封装： | 24-QFN 裸露焊盘（4x4） |
| 包装： | 带卷 (TR) |
ISL8723, ISL8724
TABLE 2. ISL872XSEQEVAL1 BOARD COMPONENT LISTING
COMPONENT
DESIGNATOR
U1
Q1, Q2
R6
R11
R1
R12
R2
R3
R4
R5
R9
C5
C9
C2
C8
C3
C7
C4
C6
C1
D1
R9
R10
R13
R14
COMPONENT FUNCTION
ISL8723 , 4 Supply Sequencer
Voltage Rail Switches
5V to UVLO_A Resistor for Divider String
UVLO_A to GND Resistor for Divider String
3.3V to UVLO_B Resistor for Divider String
UVLO_B to GND Resistor for Divider String
2.5V to UVLO_D Resistor for Divider String
UVLO_D to GND Resistor for Divider String
1.5V to UVLO_C Resistor for Divider String
UVLO_D to GND Resistor for Divider String
RESET LED Current Limiting Resistor
5V turn-on Delay Capacitor A (~10ms)
5V turn-off Delay Capacitor A (~140ms)
3.3V turn-on Delay Capacitor B (~13ms)
3.3V turn-off Delay Capacitor B (~13ms)
2.5V turn-on Delay Capacitor D (~25ms)
2.5V turn-off Delay Capacitor D (0ms)
1.5V turn-on Delay Capacitor C (~100ms)
1.5V turn-off Delay Capacitor C (~60ms)
Decoupling Capacitor
RESET Indicating LED
5V Load Resistor
3.3V Load Resistor
2.5V Load Resistor
1.5V Load Resistor
Test Points Labeled as to Function
COMPONENT DESCRIPTION
Intersil, ISL8723IR 4 Supply Sequencer
FDS6990S or equivalent, Dual N-Channel MOSFET
8.45k Ω 1%, 0402
1.47k Ω 1%, 0402
7.68k Ω 1%, 0402
2.26k Ω 1%, 0402
6.98k Ω 1%, 0402
3.01k Ω 1%, 0402
4.99k Ω 1%, 0402
4.99k Ω 1%, 0402
750 Ω 10%, 0805
DNP, 0402
0.1μF 10%, 6.3V, 0402
0.01μF 10%, 6.3V, 0402
0.01μF 10%, 6.3V, 0402
0.022μF 10%, 6.3V, 0402
DNP, 0402
0.068μF 10%, 6.3V, 0402
0.047μF 10%, 6.3V, 0402
1μF, 0805
0805, SMD LEDs Red
10 Ω 20%, 3W Carbon
10 Ω 20%, 3W Carbon
10 Ω 20%, 3W Carbon
10 Ω 20%, 3W Carbon
Application Implementations
Multiple Sequencer Implementations
In order to control the sequencing of more than 4 voltages in
applications where the integrity of these critical voltages must
be assured prior to sequencing, several of the ISL8723 or
ISL8724 devices can configured together to accomplish this.
Figure 24 shows a typical multi sequencer implementation;
note the common SYSRST signal that asserts once all
monitored voltages are valid allowing the sequence to
initiate. The sequencing is straight forward across multiple
sequencers as all DLY_ON capacitors will simultaneously
12
start charging once all monitored voltages area valid and
~10ms after the common ENABLE input signal is delivered.
This allows the choice of capacitors to be related to each
other no different than using a single sequencer. When the
common enabling signal is deasserted, this configuration will
then execute the turn-off sequence across all sequencers as
programmed by the DLY_OFF capacitor values.
With all the SYSRST pins bused together, once the on
sequence is complete, simultaneous shutdown upon any
UVLO input failure is assured as the SYSRST output will pull
low, simultaneously turning off all GATE outputs.
FN6413.1
April 22, 2009
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