参数资料
| 型号： | ISL90727WIE627Z |
| 厂商： | Intersil |
| 文件页数： | 4/8页 |
| 文件大小： | 0K |
| 描述： | IC XDCP 128-TAP 10KOHM SC70-6 |
| 产品培训模块： | Digitally Controlled Potentiometers |
| 标准包装： | 1 |
| 系列： | XDCP™ |
| 接片： | 128 |
| 电阻（欧姆）： | 10k |
| 电路数： | 1 |
| 温度系数： | 标准值 ±45 ppm/°C |
| 存储器类型： | 易失 |
| 接口： | I²C |
| 电源电压： | 2.7 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-TSSOP，SC-88，SOT-363 |
| 供应商设备封装： | SC-70-6 |
| 包装： | 管件 |
4
FN8247.8
May 10, 2012
Operating Specifications
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 19)
TYP
(Note 7)
MAX
(Note 19) UNIT
ICC1
VCC Supply Current
(Volatile write/read)
fSCL = 400kHz; SDA = Open; (for I
2C, Active,
Read and Volatile Write States only)
200
A
ISB
VCC Current (standby)
VCC = +5.5V, I
2C Interface in Standby State
500
nA
IComLkg
Common-Mode Leakage
Voltage at SDA pin to GND or VCC
3A
SCL falling edge of last bit of DCP Data Byte to
wiper change
500
ns
VCCRamp
(Note 20)
VCC Ramp Rate
0.2
V/ms
tD
Power-up Delay
VCC above VPOR, to DCP Initial Value Register
recall completed, and I2C Interface in standby state
3ms
SERIAL INTERFACE SPECIFICATIONS
VIL
SDA, and SCL Input Buffer LOW
Voltage
(Note 17)
-0.3
0.3*
VCC
V
VIH
SDA, and SCL Input Buffer HIGH
Voltage
(Note 17)
0.7*
VCC
VCC+
0.3
V
Hysteresis
SDA and SCL Input Buffer Hysteresis
0.05*
VCC
V
VOL
SDA Output Buffer LOW Voltage,
Sinking 4mA
00.4
V
Cpin (Note 18) SDA and SCL Pin Capacitance
10
pF
fSCL
SCL Frequency
400
kHz
tIN
Pulse Width Suppression Time at
SDA and SCL Inputs
Any pulse narrower than the max spec is
suppressed.
50
ns
tAA
SCL Falling Edge to SDA Output Data
Valid
SCL falling edge crossing 30% of VCC, until SDA
exits the 30% to 70% of VCC window.
900
ns
tBUF
Time the Bus Must be Free Before the
Start of a New Transmission
SDA crossing 70% of VCC during a STOP
condition, to SDA crossing 70% of VCC during
the following START condition.
1300
ns
tLOW
Clock LOW Time
Measured at the 30% of VCC crossing.
1300
ns
tHIGH
Clock HIGH Time
Measured at the 70% of VCC crossing.
600
ns
tSU:STA
START Condition Setup Time
SCL rising edge to SDA falling edge. Both
crossing 70% of VCC.
600
ns
tHD:STA
START Condition Hold Time
From SDA falling edge crossing 30% of VCC to
SCL falling edge crossing 70% of VCC.
600
ns
tSU:DAT
Input Data Setup Time
From SDA exiting the 30% to 70% of VCC
window, to SCL rising edge crossing 30% of VCC
100
ns
tHD:DAT
Input Data Hold Time
From SCL rising edge crossing 70% of VCC to
SDA entering the 30% to 70% of VCC window.
0ns
tSU:STO
STOP Condition Setup Time
From SCL rising edge crossing 70% of VCC, to
SDA rising edge crossing 30% of VCC.
600
ns
tHD:STO
STOP Condition Hold Time for Read,
or Volatile Only Write
From SDA rising edge to SCL falling edge. Both
crossing 70% of VCC.
600
ns
tDH
Output Data Hold Time
From SCL falling edge crossing 30% of VCC,
until SDA enters the 30% to 70% of VCC window.
0ns
SDA and SCL Rise Time
From 30% to 70% of VCC
20 +
0.1*Cb
250
ns
ISL90727, ISL90728
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL90727WIE627ZS2568 | 制造商:Intersil Corporation 功能描述:- Bulk |
| ISL90727WIE627Z-T7A | 功能描述:IC POT DGTL 128POS 10K SC70-6 RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:XDCP™ 标准包装:3,000 系列:DPP 接片:32 电阻（欧姆）:10k 电路数:1 温度系数:标准值 300 ppm/°C 存储器类型:非易失 接口:3 线串行（芯片选择，递增，增/减） 电源电压:2.5 V ~ 6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-WFDFN 裸露焊盘 供应商设备封装:8-TDFN（2x3） 包装:带卷 (TR) |
| ISL90727WIE627Z-TK | 功能描述:数字电位计 IC ISL90727 IND 6LD SC7 SNGVOLATILE 128 TAP RoHS:否 制造商:Maxim Integrated 电阻:200 Ohms 温度系数:35 PPM / C 容差:25 % POT 数量:Dual 每 POT 分接头:256 弧刷存储器:Volatile 缓冲刷: 数字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作电源电压:1.7 V to 5.5 V 电源电流:27 uA 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:TQFN-16 封装:Reel |
| ISL90727WIE6Z | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Digitally Controlled Potentiometer (XDCP) |
| ISL90727WIE6Z-TK | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Digitally Controlled Potentiometer (XDCP) |
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