参数资料
型号: ISL90727WIE627Z
厂商: Intersil
文件页数: 7/8页
文件大小: 0K
描述: IC XDCP 128-TAP 10KOHM SC70-6
产品培训模块: Digitally Controlled Potentiometers
标准包装: 1
系列: XDCP™
接片: 128
电阻(欧姆): 10k
电路数: 1
温度系数: 标准值 ±45 ppm/°C
存储器类型: 易失
接口: I²C
电源电压: 2.7 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 6-TSSOP,SC-88,SOT-363
供应商设备封装: SC-70-6
包装: 管件
7
FN8247.8
May 10, 2012
START, the Identification byte with the R/W bit set to “0”, an
Address Byte, a second START, and a second Identification
byte with the R/W bit set to “1”. After each of the three bytes,
the ISL90727 and ISL90728 respond with an ACK. Then the
ISL90727 and ISL90728 transmit the Data Byte as long as
the master responds with an ACK during the SCL cycle
following the eighth bit of each byte. The master then
terminates the read operation (issuing a STOP condition)
following the last bit of the Data Byte (see Figure 4).
SDA
SCL
START
DATA
STOP
STABLE
CHANGE
DATA
STABLE
FIGURE 1. VALID DATA CHANGES, START AND STOP CONDITIONS
FIGURE 2. ACKNOWLEDGE RESPONSE FROM RECEIVER
SDA OUTPUT FROM
TRANSMITTER
SDA OUTPUT FROM
RECEIVER
8
1
9
START
ACK
SCL FROM
MASTER
HIGH IMPEDANCE
FIGURE 3. BYTE WRITE SEQUENCE (ISL90727 VERSION SHOWN)
S
T
A
R
T
S
T
O
P
IDENTIFICATION
BYTE
ADDRESS
BYTE
DATA
BYTE
A
C
K
SIGNALS FROM
THE MASTER
SIGNALS FROM
THE ISL23711
A
C
K
0
11
A
C
K
WRITE
SIGNAL AT SDA
00 0 0
0
1
10 0
00 0 0
SIGNALS
FROM THE
MASTER
SIGNALS FROM
THE SLAVE
SIGNAL AT SDA
S
T
A
R
T
IDENTIFICATION
BYTE WITH
R/W = 0
ADDRESS
BYTE
A
C
K
A
C
K
00
0
11
S
T
O
P
0
1
0
11
IDENTIFICATION
BYTE WITH
R/W = 1
A
C
K
S
T
A
R
T
DATA BYTE
110
0
00 0
0 0
110
00
FIGURE 4. READ SEQUENCE (ISL90727 VERSION SHOWN)
ISL90727, ISL90728
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