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| 型号： | ISL95210EVAL1Z |
| 厂商： | Intersil |
| 文件页数： | 15/20页 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD FOR ISL95210 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 1.2V |
| 电流 - 输出： | 10A |
| 输入电压： | 5V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 800kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板，文档 |
| 已用 IC / 零件： | ISL95210 |
ISL95210
V O
operation and shut down until the IC junction temperature falls
below +135°C. Once the temperature has fallen below the lower
protection threshold, the IC will resume normal operation
following a POR event or toggling of the EN input.
POWER-GOOD MONITOR
A status indicator is provided to inform the system whether or not
the ISL95210 output voltage is in regulation or if a fault has
occurred. If VCC and PVCC are above the POR threshold, the part
is enabled, and no faults have been detected, PGOOD will toggle
high.
The power-good monitor is a CMOS configuration (refer to the
and techniques referenced in the following section. In addition to
this guide, Intersil provides complete reference designs that
include schematics, bills of materials, and example board layouts.
Selecting the LC Output Filter
The duty cycle of an ideal buck converter is a function of the
input and the output voltage. This relationship is written as
Equation 6:
D = --------- (EQ. 6)
V IN
The output inductor peak-to-peak ripple current is written as
Equation 7:
I PP = ------------------------------
provide any voltage to indicate when power is good. The voltage
provided on to the PG_IN pin will be used as the logic high value
for PGOOD. This has the advantage over open-drain
V O ? ( 1 – D )
f SW ? L
(EQ. 7)
P COPPER = I LOAD
2 (EQ. 8)
configurations of saving a pull-up resistor. A pull-up resistor on
PGOOD can still be used if desired. In this configuration, the
PG_IN pin needs to be floated.
SOFT-DISCHARGE
To ensure a known operating condition when the ISL95210 is in
a standby state, the VOUT pin is actively discharged to PGND
through an integrated 45 Ω MOSFET. The MOSFET is commanded
on if the EN pin is pulled low or if any of the previously mentioned
fault conditions are achieved with the exception of overvoltage,
which actively pulls down on VOUT as a matter of protection.
It should be noted that if an external resistor divider is used to
program VOUT to values not found in the DAC table, the
soft-discharge feature will be negatively impacted. Figure 31
illustrates this condition.
A typical step-down DC/DC converter will have an I P-P of 20% to
40% of the maximum DC output load current. The value of I P-P is
selected based upon several criteria such as MOSFET switching
loss, inductor core loss, and the resistive loss of the inductor
winding. The DC copper loss of the inductor can be estimated by
Equation 8:
? DCR
where I LOAD is the converter output DC current.
The copper loss can be significant so attention has to be given to
the DCR selection. Another factor to consider when choosing the
inductor is its saturation characteristics at elevated temperature.
A saturated inductor could cause destruction of circuit
components, as well as nuisance OCP faults.
ISL95210
V OUT
R1
A DC/DC buck regulator must have output capacitance C O into
which ripple current I P-P can flow. Current I P-P develops a
corresponding ripple voltage V P-P across C O, which is the sum of
the voltage drop across the capacitor ESR and of the voltage
change stemming from charge moved in and out of the
VOUT
capacitor. These two voltages are written as Equation 9:
Δ V ESR = I P-P ? E SR
(EQ. 9)
Δ V C = -------------------------------
SOFT-DISCHARGE
45 Ω
R2
and Equation 10:
I P-P
8 ? C O ? F SW
(EQ. 10)
If the output of the converter has to support a load with high
FIGURE 31. SIMPLIFIED SOFT-DISCHARGE CIRCUIT
The discharge resistance is increased by the presence of the
resistor divider. The total discharge resistance is expressed in
Equation 5:
pulsating current, several capacitors will need to be paralleled to
reduce the total ESR until the required V P-P is achieved. The
inductance of the capacitor can cause a brief voltage dip if the
load transient has an extremely high slew rate. Low inductance
capacitors should be considered in this scenario. A capacitor
R DCHRG = -------------------------- + R1
45 Ω ? R2
45 Ω + R2
General Application Design
Guide
(EQ. 5)
dissipates heat as a function of RMS current and frequency. Be
sure that I P-P is shared by a sufficient quantity of paralleled
capacitors so that they operate below the maximum rated RMS
current at F SW . Take into account that the rated value of a
capacitor can fade as much as 50% as the DC voltage across it
increases.
This design guide is intended to provide a high-level explanation of
the steps necessary to design a single-phase power converter. It is
assumed that the reader is familiar with many of the basic skills
15
FN6938.4
December 15, 2011
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL95210HRZ | 功能描述:直流/直流开关调节器 ISL95210 5V/10ABUCK IGRATE FET NTBOOK RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
| ISL95210HRZ-T | 功能描述:直流/直流开关调节器 ISL95210 5V/10ABUCK IGRATE FET NTBOOK RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
| ISL95210HRZ-T7A | 功能描述:直流/直流开关调节器 ISL95210 5V/10ABUCK IGRATE FET NTBOOK RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
| ISL95210IRZ | 功能描述:直流/直流开关调节器 ISL95210 5V/10ABUCK IGRATE FET INDUST RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
| ISL95210IRZ-T | 功能描述:直流/直流开关调节器 ISL95210 5V/10ABUCK IGRATE FET NTBOOK RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
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