参数资料
型号: ISL95870BIRZ
厂商: Intersil
文件页数: 21/28页
文件大小: 0K
描述: IC CTRLR PWM 1PHASE GPU 20QFN
标准包装: 75
应用: 控制器,GPU 内核电源
输入电压: 3.3 V ~ 25 V
输出数: 1
输出电压: 0.5 V ~ 5 V
工作温度: -40°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 20-VFQFN 裸露焊盘
供应商设备封装: 20-QFN(3x4)
包装: 管件
ISL95870, ISL95870A, ISL95870B
When an OCP fault is declared, the converter will be latched off
and the PGOOD pin will be asserted low. The fault will remain
latched until the EN pin has been pulled below the falling EN
threshold voltage V ENTHF or if VCC has decayed below the falling
POR threshold voltage VVCC_THF .
Overvoltage
The OVP fault detection circuit triggers after the FB pin voltage is
above the rising overvoltage threshold V OVRTH for more than 2μs.
For example, if the converter is programmed to regulate 1.0V at
the FB pin, that voltage would have to rise above the typical
V OVRTH threshold of 116% for more than 2μs in order to trip the
OVP fault latch. In numerical terms, that would be
116% x 1.0V = 1.16V. When an OVP fault is declared, the
converter will be latched off and the PGOOD pin will be asserted
low. The fault will remain latched until the EN pin has been pulled
below the falling EN threshold voltage V ENTHF or if VCC has
decayed below the falling POR threshold voltage VVCC_THF .
Although the converter has latched-off in response to an OVP
fault, the LGATE gate-driver output will retain the ability to toggle
the low-side MOSFET on and off, in response to the output
voltage transversing the V OVRTH and V OVFTH thresholds. The
LGATE gate-driver will turn-on the low-side MOSFET to discharge
the output voltage, protecting the load. The LGATE gate-driver will
turn-off the low-side MOSFET once the FB pin voltage is lower
than the falling overvoltage threshold V OVRTH for more than 2μs.
The falling overvoltage threshold V OVFTH is typically 102%. That
means if the FB pin voltage falls below 102% x 1.0V = 1.02V for
more than 2μs, the LGATE gate-driver will turn off the low-side
MOSFET. If the output voltage rises again, the LGATE driver will
again turn on the low-side MOSFET when the FB pin voltage is
above the rising overvoltage threshold V OVRTH for more than 2μs.
By doing so, the IC protects the load when there is a consistent
overvoltage condition.
Undervoltage
The UVP fault detection circuit triggers after the FB pin voltage is
below the undervoltage threshold V UVTH for more than 2μs. For
example if the converter is programmed to regulate 1.0V at the FB
pin, that voltage would have to fall below the typical V UVTH
threshold of 84% for more than 2μs in order to trip the UVP fault
latch. In numerical terms, that would be 84% x 1.0V = 0.84V.
When a UVP fault is declared, the converter will be latched off and
the PGOOD pin will be asserted low. The fault will remain latched
until the EN pin has been pulled below the falling EN threshold
voltage V ENTHF or if VCC has decayed below the falling POR
threshold voltage V VCC_THF .
Over-Temperature
When the temperature of the IC increases above the rising threshold
temperature T OTRTH , it will enter the OTP state that suspends the
PWM, forcing the LGATE and UGATE gate-driver outputs low. The
status of the PGOOD pin does not change nor does the converter
latch-off. The PWM remains suspended until the IC temperature
falls below the hysteresis temperature T OTHYS at which time normal
PWM operation resumes. The OTP state can be reset if the EN pin is
pulled below the falling EN threshold voltage V ENTHF or if VCC has
decayed below the falling POR threshold voltage VVCC_THF . All other
protection circuits remain functional while the IC is in the OTP state.
21
It is likely that the IC will detect an UVP fault because in the absence
of PWM, the output voltage decays below the undervoltage
threshold V UVTH .
PGOOD Monitor
The PGOOD pin indicates when the converter is capable of
supplying regulated voltage. The PGOOD pin is an undefined
impedance if the VCC pin has not reached the rising POR threshold
V VCC_THR , or if the VCC pin is below the falling POR threshold
V VCC_THF . If there is a fault condition of output overcurrent,
overvoltage or undervoltage, PGOOD is asserted low. The PGOOD
pull-down impedance is 50 Ω.
Integrated MOSFET Gate-Drivers
The LGATE pin and UGATE pins are MOSFET driver outputs. The
LGATE pin drives the low-side MOSFET of the converter while the
UGATE pin drives the high-side MOSFET of the converter.
The LGATE driver is optimized for low duty-cycle applications
where the low-side MOSFET experiences long conduction times.
In this environment, the low-side MOSFETs require exceptionally
low r DS(ON) and tend to have large parasitic charges that conduct
transient currents within the devices in response to high dv/dt
switching present at the phase node. The drain-gate charge in
particular can conduct sufficient current through the driver
pull-down resistance that the V GS(th) of the device can be
exceeded and turned on. For this reason, the LGATE driver has
been designed with low pull-down resistance and high sink
current capability to ensure clamping the MOSFETs gate voltage
below V GS(th) .
Adaptive Shoot-Through Protection
Adaptive shoot-through protection prevents a gate-driver output
from turning on until the opposite gate-driver output has fallen
below approximately 1V. The dead-time shown in Figure 18 is
extended by the additional period that the falling gate voltage
remains above the 1V threshold. The high-side gate-driver output
voltage is measured across the UGATE and PHASE pins while the
low-side gate-driver output voltage is measured across the LGATE
and PGND pins. The power for the LGATE gate-driver is sourced
directly from the PVCC pin. The-power for the UGATE gate-driver is
supplied by a boot-strap capacitor connected across the BOOT
and PHASE pins. The capacitor is charged each time the phase
node voltage falls a diode drop below PVCC such as when the
low-side MOSFET is turned on.
FN6899.1
December 2, 2013
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