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参数资料
| 型号： | ISL97672AIRZ-T |
| 厂商： | Intersil |
| 文件页数： | 12/16页 |
| 文件大小： | 0K |
| 描述： | IC LED DRVR LOW DIMMING 20QFN |
| 标准包装： | 6,000 |
| 拓扑： | PWM，升压（升压） |
| 输出数： | 6 |
| 内部驱动器： | 是 |
| 类型 - 主要： | 背光 |
| 频率： | 200kHz ~ 1.5MHz |
| 电源电压： | 4.5 V ~ 26.5 V |
| 输出电压： | 45V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-VFQFN 裸露焊盘 |
| 供应商设备封装： | 20-QFN（3x4） |
| 包装： | 带卷 (TR) |
| 工作温度： | -40°C ~ 85°C |
ISL97672A
TABLE 1. PROTECTIONS TABLE
CASE
1
FAILURE MODE
CHX short circuit
DETECTION MODE
Upper
FAILED CHANNEL ACTION
CHX ON and burns power.
GOOD CHANNEL ACTION
Remaining channels normal
V OUT
REGULATED BY
Highest VF of all
Over-Temperature
Protection limit (OTP)
not triggered, and
VCHX < 7.5V
channels
2
CHX short circuit
Upper OTP triggered,
All channels go off until chip cools,
Same as CHX
Highest VF of
but VCHX < 7.5V
and then come back on with current
reduced to 76%. Subsequent OTP
triggers further reduce I OUT .
remaining
channels
3
CHX short circuit
Upper OTP not
CHX disabled after six PWM cycle
Remaining channels normal
Highest VF of
triggered, but
CHX > 7.5V
time-outs.
remaining
channels
4
CHX open circuit with Upper OTP not
infinite resistance triggered, and
CHX < 7.5V
V OUT ramps to OVP. CHX times out
after six PWM cycles and switches
off. V OUT drops to normal level.
Remaining channels normal
Highest VF of
remaining
channels
5
CHX LED open circuit Upper OTP not
CHX remains ON and has highest VF; Remaining channels ON, remaining VF of CHX
but has paralleled
Zener
triggered, and
CHX < 7.5V
thus, V OUT increases.
channel FETs burn power
6
CHX LED open circuit Upper OTP triggered,
but CHX < 7.5V
but has paralleled
All channels go off until chip cools,
and then come back on with current
Same as CHX
VF of CHX
Zener
reduced to 76%. Subsequent OTP
triggers further reduce I OUT .
7
CHX LED open circuit Upper OTP not
but has paralleled triggered, but
Zener CHX > 7.5V
CHX remains ON and has highest VF; V OUT increases, then CHX switches
thus, V OUT increases. OFF after six PWM cycles. This is an
unwanted shut off and can be
VF of CHX
prevented by setting OVP at an
appropriate level.
8
Channel-to-channel
Δ VF too high
Lower OTP triggered,
but CHX< 7.5V
Any channel below the target current faults out after six PWM cycles.
Remaining channels are driven with normal current.
Highest VF of
remaining
channels
9
Channel-to-channel
Δ VF too high
Upper OTP triggered,
but CHX < 7.5V
All channels go off until chip cools and then come back on with current
reduced to 75%. Subsequent OTP triggers further reduce I OUT .
Boost switches off
10
Output LED stack
voltage too high
V OUT > VOVP
Any channel that is below the target current times out after six PWM cycles, Highest VF of
and V OUT returns to normal regulation voltage required for other channels. remaining
channels
11
V OUT /LX shorted to
GND at start-up, or
V OUT shorted in
operation
LX current and timing Chip is permanently shut down 31ms after power-up if V OUT /LX is shorted
monitored. to GND.
OVP pins monitored
for excursions below
20% of OVP
threshold.
Component Selection
According to the inductor Voltage-Second Balance principle, the
change of inductor current during the switching regulator On
time is equal to the change of inductor current during the
switching regulator Off time. As shown in Equations 6 and 7,
Where D is the switching duty cycle defined by the turn-on time
over the switching period. V D is a Schottky diode forward voltage
that can be neglected for approximation.
Rearranging the terms without accounting for V D gives the boost
ratio and duty cycle, respectively, as shown in Equations 8 and 9:
Δ I L = ------- x Δ t
since the voltage across an inductor is:
V L
L
(EQ. 6)
V O ? V I = 1 ? ( 1 – D )
D = ( V O – V I ) ? V O
(EQ. 8)
(EQ. 9)
and Δ I L @ On = Δ I L @ Off, therefore:
( V I – 0 ) ? L × D × t S = ( V O – V D – V I ) ? L × ( 1 – D ) × t S
12
(EQ. 7)
FN7710.3
November 22, 2013
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