- 您现在的位置：买卖IC网 > PDF目录19780 > ISPLSI 2064VE-280LB100 (Lattice Semiconductor Corporation)IC PLD ISP 64I/O 3.5NS 100CABGA PDF资料下载
参数资料
| 型号： | ISPLSI 2064VE-280LB100 |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 3/17页 |
| 文件大小： | 0K |
| 描述： | IC PLD ISP 64I/O 3.5NS 100CABGA |
| 标准包装： | 184 |
| 系列： | ispLSI® 2000VE |
| 可编程类型： | 系统内可编程 |
| 最大延迟时间 tpd(1)： | 3.5ns |
| 电压电源 - 内部： | 3 V ~ 3.6 V |
| 逻辑元件/逻辑块数目： | 16 |
| 宏单元数： | 64 |
| 门数： | 2000 |
| 输入/输出数： | 64 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-LFBGA |
| 供应商设备封装： | 100-CABGA（10x10） |
| 包装： | 托盘 |
| 其它名称： | ISPLSI2064VE-280LB100 |
11
Specifications ispLSI 2064VE
32-I/O Signal Descriptions
GOE 0/IN 3
This pin performs one of two functions. It can be programmed to function as a Global Output Enable
pin or a Dedicated Input pin.
GOE 1/Y0
This pin performs one of two functions. (1) It can be programmed to function as a GLobal Output Enable
or a Dedicated Clock input. (2) This clock input is connected to one of the clock inputs of all GLBs on
the device.
RESET/Y1
This pin performs two functions: (1) Active Low (0) Reset pin which resets all of the registers in the
device. (2) When active low (0), it functions as a dedicated clock input.
BSCAN
Input – Dedicated in-system programming Boundary Scan Enable input pin. This pin is brought low to
enable the programming mode. The TMS, TDI, TDO and TCK controls become active.
TDI/IN 0
Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as a serial data input
pin to load programming data into the device. (2) When BSCAN is high, it functions as a dedicated input
pin.
TMS/IN 2
Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as a mode control pin
for the Boundary Scan state machine. (2) When
BSCAN is high, it functions as a dedicated input pin.
TDO/IN 1
Output/Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as an output
pin to read serial shift register data. (2) When
BSCAN is high, it functions as a dedicated input pin.
TCK/Y2
Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as a clock pin for the
Boundary Scan state machine. (2) When
BSCAN is high, it functions as a dedicated clock input.
GND
Ground (GND)
VCC
Vcc
NC1
No Connect
I/O
Input/Output pins – These are the general purpose I/O pins used by the logic array.
64-I/O Signal Descriptions
RESET
Active Low (0) Reset pin resets all the registers in the device.
GOE 0, GOE1
Global Output Enable input pins.
Y0, Y1, Y2
Dedicated Clock Input – These clock inputs are connected to one of the clock inputs of all the GLBs in
the device.
BSCAN
Input – Dedicated in-system programming Boundary Scan enable input pin. This pin is brought low to
enable the programming mode. The TMS, TDI, TDO and TCK controls become active.
TDI/IN 0
Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as a serial data input
pin to load programming data into the device. When BSCAN is high, it functions as a dedicated input pin.
TCK/IN 3
Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as a clock pin for the
Boundary Scan state machine. (2) When
BSCAN is high, it functions as a dedicated input pin.
TMS/IN 1
Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as a mode control pin
for the Boundary Scan state machine. (2) When
BSCAN is high, it functions as a dedicated input pin.
TDO/IN 2
Output/Input – This pin performs two functions. (1) When
BSCAN is logic low, it functions as an output
pin to read serial shift register data. (2) When
BSCAN is high, it functions as a dedicated input pin.
GND
Ground (GND)
VCC
Vcc
NC1
No Connect
I/O
Input/Output Pins – These are the general purpose I/O pins used by the logic array.
Signal Name
Description
1. NC pins are not to be connected to any active signals, VCC or GND.
Signal Name
Description
1. NC pins are not to be connected to any active signals, VCC or GND.
相关PDF资料 |
PDF描述 |
|---|---|
| ACM25DTMI-S189 | CONN EDGECARD 50POS R/A .156 SLD |
| LTM4614EV#PBF | IC UMODULE DC/DC DUAL 4A 144LGA |
| LC4128V-5TN144C | IC CPLD 128MACROCELLS 144TQFP |
| LC4128V-75T128I | IC PLD 128MC 92I/O 7.5NS 128TQFP |
| ACM25DTBI-S189 | CONN EDGECARD 50POS R/A .156 SLD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISPLSI2064VE-280LB100 | 功能描述:CPLD - 复杂可编程逻辑器件 RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| ISPLSI2064VE-280LT100 | 功能描述:CPLD - 复杂可编程逻辑器件 RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| ISPLSI2064VE-280LT44 | 功能描述:CPLD - 复杂可编程逻辑器件 RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| ISPLSI2064VE-280LTN100 | 功能描述:CPLD - 复杂可编程逻辑器件 RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| ISPLSI2064VE-280LTN44 | 功能描述:CPLD - 复杂可编程逻辑器件 RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
发布紧急采购，3分钟左右您将得到回复。