参数资料
型号: ISPPAC-CLK5304S-01TN48C
厂商: Lattice Semiconductor Corporation
文件页数: 34/56页
文件大小: 0K
描述: IC CLOCK PROGRAM BUFFER 48TQFP
标准包装: 250
系列: ispClock™
类型: 时钟发生器,扇出配送,零延迟缓冲器
PLL: 带旁路
输入: HSTL,LVCMOS,LVDS,LVPECL,LVTTL,SSTL
输出: eHSTL,HSTL,LVCMOS,LVTTL,SSTL
电路数: 1
比率 - 输入:输出: 2:4
差分 - 输入:输出: 是/无
频率 - 最大: 267MHz
除法器/乘法器: 是/无
电源电压: 3 V ~ 3.6 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-TQFP(7x7)
包装: 托盘
Lattice Semiconductor
ispClock5300S Family Data Sheet
4
Figure 4. ispClock5316S Functional Block Diagram
Figure 5. ispClock5320S Functional Block Diagram
VCO
LOOP
FILTER
PHASE
DETECT
LOCK
DETECT
1
0
OEX
S
A
P
Y
B
_
L
P
K
C
O
L
JTAG INTERFACE
OEY
TDI
TMS
TCK
TDO
SKEW
CONTROL
OUTPUT
DRIVERS
SKEW
CONTROL
OUTPUT
DRIVERS
BANK _5 A
BANK _5 B
OUTPUT
DIVIDERS
OUTPUT ROUTING
MATRIX
RESET
V1
V2
V0
BANK _0 A
BANK _0 B
BANK _1 A
BANK _1 B
BANK _2 A
BANK _2 B
BANK _3 A
BANK _3 B
BANK _4 A
BANK _4 B
OUTPUT ENABLE
CONTROLS
5-bit
0
1
REFA_REFP
REFSEL
VTT_REFB
REFB_REFN
VTT_REFA
VTT_FBK
FBK
BANK _6 A
BANK _6 B
BANK _7 A
BANK _7 B
VCO
LOOP
FILTER
PHASE
DETECT
LOCK
DETECT
1
0
OEX
S
A
P
Y
B
_
L
P
K
C
O
L
JTAG INTERFACE
OEY
TDI
TMS
TCK
TDO
SKEW
CONTROL
OUTPUT
DRIVERS
SKEW
CONTROL
OUTPUT
DRIVERS
BANK_5A
BANK_5B
OUTPUT
DIVIDERS
OUTPUT ROUTING
MATRIX
RESET
V1
V2
V0
BANK_0A
BANK_0B
BANK_1A
BANK_1B
BANK_2A
BANK_2B
BANK_3A
BANK_3B
BANK_4A
BANK_4B
OUTPUT ENABLE
CONTROLS
5-bit
0
1
REFA_REFP
REFSEL
VTT_REFB
REFB_REFN
VTT_REFA
VTT_FBK
FBK
BANK_9A
BANK_9B
BANK_6A
BANK_6B
BANK_7A
BANK_7B
BANK_8A
BANK_8B
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