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参数资料
| 型号： | IT80C52XXX-12D |
| 厂商： | TEMIC SEMICONDUCTORS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP44 |
| 文件页数： | 8/32页 |
| 文件大小： | 3152K |
| 代理商： | IT80C52XXX-12D |
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15
7707F–AVR–11/10
AT90USB82/162
4.8.1
Interrupt Response Time
The interrupt execution response for all the enabled AVR interrupts is five clock cycles minimum.
After five clock cycles the program vector address for the actual interrupt handling routine is exe-
cuted. During these five clock cycle period, the Program Counter is pushed onto the Stack. The
vector is normally a jump to the interrupt routine, and this jump takes three clock cycles. If an
interrupt occurs during execution of a multi-cycle instruction, this instruction is completed before
the interrupt is served. If an interrupt occurs when the MCU is in sleep mode, the interrupt exe-
cution response time is increased by five clock cycles. This increase comes in addition to the
start-up time from the selected sleep mode.
A return from an interrupt handling routine takes three clock cycles. During these three clock
cycles, the Program Counter (three bytes) is popped back from the Stack, the Stack Pointer is
incremented by three, and the I-bit in SREG is set.
Assembly Code Example
sei
; set Global Interrupt Enable
sleep
; enter sleep, waiting for interrupt
; note: will enter sleep before any pending
; interrupt(s)
C Code Example
__enable_interrupt(); /* set Global Interrupt Enable */
__sleep(); /* enter sleep, waiting for interrupt */
/* note: will enter sleep before any pending interrupt(s) */
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IT80F | 制造商:未知厂家 制造商全称:未知厂家 功能描述:TRIAC|50V V(DRM)|8A I(T)RMS|TO-220 |
| IT80G | 制造商:未知厂家 制造商全称:未知厂家 功能描述:TRIAC|50V V(DRM)|8A I(T)RMS|TO-220 |
| IT810B | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog IC |
| IT8152FG | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Specification|Errata_v0.1 for it8152fg_v0.3.4 |
| IT8172G | 制造商:未知厂家 制造商全称:未知厂家 功能描述:RISC Companion Chip|Errata v0.2 for it8172g_v0.6 |
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