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参数资料
| 型号： | K1S64161CC-W3000 |
| 元件分类： | SRAM |
| 英文描述： | 4M X 16 STANDARD SRAM, 70 ns, UUC |
| 封装： | ROHS COMPLIANT, WAFER |
| 文件页数： | 10/13页 |
| 文件大小： | 244K |
| 代理商： | K1S64161CC-W3000 |
Revision 1.0
April 2005
K1S64161CC
- 6 -
UtRAM
AC OPERATING CONDITIONS
TEST CONDITIONS(Test Load and Test Input/Output Reference)
Input pulse level: 0.4 to 2.2V
Input rising and falling time: 3ns
Input and output reference voltage: 0.5 x VCCQ
Output load (See right): CL=30pF
AC CHARACTERISTICS (Vcc=VCCQ=2.7~3.1V, TA=-40 to 85°C)
1. tWP(min)=70ns for continuous write operation over 50 times.
Parameter List
Symbol
Speed Bins
Units
70ns
Min
Max
Common
CS High Pulse Width
tCSHP
10
-
ns
Read
Address Access Time
tAA
-70
ns
Chip Select to Output
tCO
-70
ns
Output Enable to Valid Output
tOE
-35
ns
UB, LB Access Time
tBA
-70
ns
Chip Select to Low-Z Output
tLZ
10
-
ns
UB, LB Enable to Low-Z Output
tBLZ
10
-
ns
Output Enable to Low-Z Output
tOLZ
5-
ns
Chip Disable to High-Z Output
tHZ
025
ns
UB, LB Disable to High-Z Output
tBHZ
025
ns
Output Disable to High-Z Output
tOHZ
025
ns
Output Hold from Address Change
tOH
3-
ns
Page Cycle
tPC
25
-
ns
Page Access Time
tPA
-20
ns
Write
Write Cycle Time
tWC
70
-
ns
Chip Select to End of Write
tCW
60
-
ns
Address Set-up Time
tAS
0-
ns
Address Valid to End of Write
tAW
60
-
ns
UB, LB Valid to End of Write
tBW
60
-
ns
Write Pulse Width
tWP
551)
-ns
WE High Pulse Width
tWHP
5-
ns
Write Recovery Time
tWR
0-
ns
Write to Output High-Z
tWHZ
025
ns
Data to Write Time Overlap
tDW
30
-
ns
Data Hold from Write Time
tDH
0-
ns
End Write to Output Low-Z
tOW
5-
ns
Vt=0.5 x VCC
50
Dout
30pF
Z0=50
AC Output Load Circuit
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