参数资料
型号: KMPC853TZT100A
厂商: Freescale Semiconductor
文件页数: 12/88页
文件大小: 0K
描述: IC MPU PWRQUICC 100MHZ 256PBGA
标准包装: 2
系列: MPC8xx
处理器类型: 32-位 MPC8xx PowerQUICC
速度: 100MHz
电压: 1.8V
安装类型: 表面贴装
封装/外壳: 256-BGA
供应商设备封装: 256-PBGA(23x23)
包装: 托盘
MPC853T Hardware Specification, Rev. 1
2
Freescale Semiconductor
Features
and incorporates memory management units (MMUs), instruction and data caches. The MPC853T is a subset of this
family of devices and is the main focus of this document.
2Features
The MPC853T is comprised of three modules that each use the 32-bit internal bus: a MPC8xx core, a system
integration unit (SIU), and a communications processor module (CPM). The MPC853T block diagram is shown in
The following list summarizes the key MPC853T features:
Embedded MPC8xx core up to 100 MHz
Maximum frequency operation of the external bus is 66 MHz
— The 50-/66-MHz core frequencies support both the 1:1 and 2:1 modes.
— The 80-/100-MHz core frequencies support 2:1 mode only.
Single-issue, 32-bit core (compatible with the PowerPC architecture definition) with thirty-two 32-bit
general-purpose registers (GPRs)
— The core performs branch prediction with conditional prefetch and without conditional execution.
— 4-Kbyte data cache and 4-Kbyte instruction cache
– Instruction cache is two-way, set-associative with 128 sets
– Data cache is two-way, set-associative with 128 sets
– Cache coherency for both instruction and data caches is maintained on 128-bit (4-word) cache
blocks.
– Caches are physically addressed, implement a least recently used (LRU) replacement algorithm, and
are lockable on a cache block basis.
— MMUs with 32-entry translation look-aside buffer (TLB), fully associative instruction, and data TLBs
— MMUs support multiple page sizes of 4 Kbytes, 16 Kbytes, 512 Kbytes, and 8 Mbytes; 16 virtual
address spaces and 16 protection groups
Up to 32-bit data bus (dynamic bus sizing for 8, 16, and 32 bits)
32 address lines
Memory controller (eight banks)
— Contains complete dynamic RAM (DRAM) controller
— Each bank can be a chip select or RAS to support a DRAM bank.
— Up to 30 wait states programmable per memory bank
— Glueless interface to DRAM, SIMMS, SRAM, EPROMs, Flash EPROMs, and other memory devices
— DRAM controller programmable to support most size and speed memory interfaces
— Four CAS lines, four WE lines, and one OE line
— Boot chip-select available at reset (options for 8-, 16-, or 32-bit memory)
— Variable block sizes (32 Kbytes–256 Mbytes)
— Selectable write protection
— On-chip bus arbitration logic
Fast Ethernet Controller (FEC)
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KMPC8540CPX667JB 功能描述:微处理器 - MPU PQ 3 8540DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
KMPC8540CVT667JB 功能描述:微处理器 - MPU PQ 3 8540-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
KMPC8540PX667LB 功能描述:微处理器 - MPU PQ 3 8540DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
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