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参数资料
| 型号： | KMPC8540PX833LC |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 2/24页 |
| 文件大小： | 0K |
| 描述： | IC MPU PWRQUICC 783-FCPBGA |
| 标准包装： | 2 |
| 系列： | MPC85xx |
| 处理器类型： | 32-位 MPC85xx PowerQUICC III |
| 速度： | 833MHz |
| 电压： | 1.2V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 784-BBGA，FCBGA |
| 供应商设备封装： | 783-FCPBGA（29x29） |
| 包装： | 托盘 |
MPC8540 PowerQUICC III Integrated Host Processor Product Brief, Rev. 0.1
10
Freescale Semiconductor
MPC8540 Architecture Overview
– Vector offset registers (IVORs) 0–15 as defined in Book E, plus e500-defined IVORs 32–35
– Exception syndrome register (ESR)
– Book E–defined preempting critical interrupt, including critical interrupt status registers (CSRR0
and CSRR1) and an rfci instruction
— e500-specific interrupts not defined in Book E architecture
– SPE APU unavailable exception
– Floating-point data exception
– Floating-point round exception
– Performance monitor
Memory management unit (MMU)
— Data L1 MMU
– Four-entry, fully-associative TLB array for variable-sized pages
– 64-entry, four-way set-associative TLB for 4-Kbyte pages
— Instruction L1 MMU
– Four-entry, fully-associative TLB array for variable-sized pages
– 64-entry, four-way set-associative TLB for 4-Kbyte pages
— Unified L2 MMU
– 16-entry, fully-associative TLB array for variable-sized pages
– 256-entry, two-way set-associative TLB for 4-Kbyte pages
— Software reload for TLBs
— Virtual memory support for as much as 4 Gbytes (232) of virtual memory
— Real memory support for as much as 4 Gbytes (2
32) of physical memory
— Support for big-endian and true little-endian memory on a per-page basis
Power management
— Low power, 1.2-V design
— Dynamic power management on the core minimizes power consumption of functional units, such as
execution units, caches, and MMUs, when they are idle.
— Core power-saving modes: core-halted and core-stopped
— NAP, DOZE, and SLEEP bits in HID0 that can be used to assert nap, doze, and sleep core output signals
to initiate power-saving modes at the integrated-device level
— Internal clock multipliers of 2x, 2.5x, and 3x from bus clock
Testability
— LSSD scan design
— JTAG interface
— ESP support
— ABIST for arrays
—LBIST
Reliability and serviceability
— Internal code parity
— Parity checking on e500 local bus
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| KMPC8540PXAQFB | 功能描述:微处理器 - MPU PQ 3 DRACO-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| KMPC8540VT667LB | 功能描述:微处理器 - MPU PQ 3 8540-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| KMPC8540VT667LC | 功能描述:微处理器 - MPU PQ 3 8540-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| KMPC8540VT833LB | 功能描述:微处理器 - MPU PQ 3 8540DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| KMPC8540VT833LC | 功能描述:微处理器 - MPU PQ 3 8540-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
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