参数资料
型号: KSZ8051MLL-EVAL
厂商: Micrel Inc
文件页数: 2/48页
文件大小: 0K
描述: BOARD EVALUATION FOR KSZ8051MLL
标准包装: 1
主要目的: 接口,以太网 PHY
嵌入式:
已用 IC / 零件: KSZ8051MLL
已供物品:
相关产品: 576-3888-6-ND - TXRX PHY 10/T100 3.3V MII 48LQFP
576-3888-1-ND - TXRX PHY 10/T100 3.3V MII 48LQFP
576-3888-2-ND - TXRX PHY 10/T100 3.3V MII 48LQFP
KSZ8051MLL TR-ND - TXRX PHY 10/T100 3.3V MII 48LQFP
576-3731-ND - TXRX PHY 10/T100 3.3V MII 48LQFP
其它名称: 576-3864
Micrel, Inc.
KSZ8051MLL
July 2010
10
M9999-071210-1.0
Pin Description – KSZ8051MLL (Continued)
Pin Number
Pin Name
Type
(1)
Pin Function
26
NC
-
No connect
27
RXDV /
CONFIG2
Ipd/O
MII Mode:
MII Receive Data Valid Output /
Config Mode:
The pull-up/pull-down value is latched as CONFIG2 at the
de-assertion of reset. See Strapping Options section for details.
28
RXC /
B-CAST_OFF
Ipd/O
MII Mode:
MII Receive Clock Output
Config Mode:
The pull-up/pull-down value is latched as B-CAST_OFF at the
de-assertion of reset. See Strapping Options section for details.
29
RXER /
ISO
Ipd/O
MII Mode:
MII Receive Error Output /
Config Mode:
The pull-up/pull-down value is latched as ISOLATE at the
de-assertion of reset. See Strapping Options section for details.
30
GND
Gnd
Ground
31
VDD_1.2
P
1.2V core VDD
(power supplied by KSZ8051MLL)
Decouple with 0.1uF capacitor to ground, and join with pin 4 by power trace or plane.
32
INTRP /
NAND_Tree#
Ipu/Opu
Interrupt Output: Programmable Interrupt Output
This pin has a weak pull-up, is open-drain like, and requires an external 1.0K
Ω
pull-up resistor.
Config Mode:
The pull-up/pull-down value is latched as NAND Tree# at the
de-assertion of reset. See Strapping Options section for details.
33
TXC
I/O
MII Mode:
MII Transmit Clock Output
MII Back-to-Back Mode:
MII Transmit Clock Input
34
TXEN
I
MII Mode:
MII Transmit Enable Input
35
TXD0
I
MII Mode:
MII Transmit Data Input[0]
(3)
36
TXD1
I
MII Mode:
MII Transmit Data Input[1]
(3)
37
GND
Gnd
Ground
38
TXD2
I
MII Mode:
MII Transmit Data Input[2]
(3)
39
TXD3
I
MII Mode:
MII Transmit Data Input[3]
(3)
40
COL /
CONFIG0
Ipd/O
MII Mode:
MII Collision Detect Output /
Config Mode:
The pull-up/pull-down value is latched as CONFIG0 at the
de-assertion of reset. See Strapping Options section for details.
41
CRS /
CONFIG1
Ipd/O
MII Mode:
MII Carrier Sense Output /
Config Mode:
The pull-up/pull-down value is latched as CONFIG1 at the
de-assertion of reset. See Strapping Options section for details.
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