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参数资料
| 型号： | KSZ8721CL TR |
| 厂商： | Micrel Inc |
| 文件页数： | 6/32页 |
| 文件大小： | 0K |
| 描述： | TXRX 10/100 3.3V 48-LQFP |
| 标准包装： | 1,000 |
| 类型： | 收发器 |
| 驱动器/接收器数： | 1/1 |
| 规程： | MII |
| 电源电压： | 3 V ~ 3.6 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 带卷 (TR) |
| 其它名称： | KSZ8721CLTR KSZ8721CLTR-ND |
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KS8721CL
Micrel
M9999-100804
14
October 2004
to the RMII. TX_EN is negated prior to the first REF_CLK following the final di-bit of a frame. TX_EN transitions synchronously
with respect to REF_CLK.
Transmit Data [1:0] (TXD[1:0])
Transmit Data TXD[1:0] transitions synchronously with respect to REF_CLK. When TX_EN is asserted, TXD[1:0] are accepted
for transmission by the PHY. TXD[1:0] remains as “00” to indicate idle when TX_EN is de-asserted. Values of TXD[1:0] other
than “00” when TX_EN is de-asserted are reserved for out-of-band signalling (to be defined). Values other than “00” on
TXD[1:0] while TX_EN is de-asserted are ignored by the PHY.
Collision Detection
Since the definition of CRS_DV and TX_EN both contain an accurate indication of the start of frame, the MAC reliably
regenerates the COL signal of the MII by ending TX_EN and CRS_DV.
During the IPG time following the successful transmission of a frame, the COL signal is asserted by some transceivers as a
self-test. The Signal Quality Error (SQE) function is not supported by the reduced MII due to the lack of the COL signal.
Historically, SQE was present to indicate that a transceiver located physically remote from the MAC was functioning. Since
the reduced MII only supports chip-to-chip connections on a PCB, SQE functionality is not required.
RX_ER
The PHY provides RX_ER as an output according to the rules specified in IEEE 802.3u [2] (see Clause 24, Figure 24-11–
Receive State Diagram). RX_ER is asserted for one or more REF_CLK periods to indicate that an error (e.g., a coding error
or any error that a PHY is capable of detecting, and that may otherwise be undetectable by the MAC sublayer) is detected
somewhere in the frame presently being transferred from the PHY. RX_ER transitions synchronously with respect to
REF_CLK. While CRS_DV is de-asserted, RX_ER has no effect on the MAC.
RMII AC Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
REF_CLK Frequency
50
MHz
REF_CLK Duty Cycle
35
65
%
t
SU
TXD[1:0], TX_EN, RXD[1:0], CRS_DV, RXER
4
ns
t
H
TXD[1:0], TX_EN, RXD[1:0], CRS_DV, RXER
2
ns
Data Hold from REF_CLK
Rising Edge
Unused RMII Pins
Input Pins
TXD[2:3] and TXER are pull-down to GND.
Output Pins
RXD[2:3] and RXC are no connect.
Note that the RMII pin needs to be pulled up to enable RMII mode.
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| KSZ8721SL | 功能描述:以太网 IC 10/100 Base-TX/FX Physical Layer Transceiver, Single 3.3V Supply, 48-SSOP (Lead Free) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8721SL TR | 功能描述:以太网 IC 10/100 Base-TX/FX Physical Layer Transceiver, Single 3.3V Supply, 48-SSOP (Lead Free) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8721SLA4 | 功能描述:TXRX 10/100 3.3V 48-SSOP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:1,140 系列:AU 类型:收发器 驱动器/接收器数:1/1 规程:CAN 电源电压:5.3 V ~ 27 V 安装类型:表面贴装 封装/外壳:14-SOIC（0.154"，3.90mm 宽） 供应商设备封装:14-SO 包装:管件 其它名称:935267940512AU5790D14AU5790D14-ND |
| KSZ8721SLA4 TR | 功能描述:TRANSCEIVER 10/100 3.3V 48-SSOP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:1,140 系列:AU 类型:收发器 驱动器/接收器数:1/1 规程:CAN 电源电压:5.3 V ~ 27 V 安装类型:表面贴装 封装/外壳:14-SOIC（0.154"，3.90mm 宽） 供应商设备封装:14-SO 包装:管件 其它名称:935267940512AU5790D14AU5790D14-ND |
| KSZ8721SL-EVAL | 功能描述:以太网开发工具 KSZ8721SL Evaluation Board RoHS:否 制造商:Micrel 产品:Evaluation Boards 类型:Ethernet Transceivers 工具用于评估:KSZ8873RLL 接口类型:RMII 工作电源电压: |
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