参数资料
型号: KSZ8842-16MQL
厂商: Micrel Inc
文件页数: 100/141页
文件大小: 0K
描述: IC SWITCH 10/100 16BIT 128PQFP
标准包装: 66
控制器类型: 以太网开关控制器
接口: PCI
电源电压: 3.1 V ~ 3.5 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 128-BFQFP
供应商设备封装: 128-PQFP(14x20)
包装: 管件
产品目录页面: 1081 (CN2011-ZH PDF)
配用: 576-1634-ND - BOARD EVALUATION KSZ8842-16MQL
其它名称: 576-1478-5
Micrel, Inc.
KSZ8842-16/32 MQL/MVL/MVLI/MBL
October 2007
61
M9999-102207-1.9
Bank 0 QMU RX Flow Control High Watermark Configuration Register (0x04): QRFCR
This register contains the user defined QMU RX Queue high watermark configuration bit as below.
Bit
Default Value
R/W
Description
15-13
0x0
RO
Reserved
12
0
RW
QMU RX Flow Control High Watermark Configuration
0: 3 KBytes
1: 2 KBytes
11-0
0x000
RO
Reserved
Bank 0 Bus Error Status Register (0x06): BESR
This register flags the different kinds of errors on the host bus.
Bit
Default Value
R/W
Description
15
0
RO
IBEC Illegal Byte Enable Combination
1: illegal byte enable combination occurs. The illegal combination value can be found
from bit 14 to bit 11.
0: legal byte enable combination.
Write 1 to clear.
14-11
-
RO
IBECV Illegal Byte Enable Combination Value
Bit 14: byte enable 3.
Bit 13: byte enable 2.
Bit 12: byte enable 1.
Bit 11: byte enable 0.
This value is valid only when bit 15 is set to 1.
10
0
RO
SSAXFER Simultaneous Synchronous and Asnychronous Transfers
1: Synchronous and Asnychronous Transfers occur simultaneously.
0: normal.
Write 1 to clear.
9-0
0x000
RO
Reserved
Bank 0 Bus Burst Length Register (0x08): BBLR
Before the burst can be sent, the burst length needs to be programmed.
Bit
Default Value
R/W
Description
15
0
RO
Reserved
14-12
0x0
RW
BRL Burst Length (for burst read and write)
000: single.
011: fixed burst read length of 4.
101: fixed burst read length of 8.
111: fixed burst read length of 16.
11-0
0x000
RO
Reserved
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