Micrel, Inc.
KS8995MA/FQ
October 2011
27
M9999-102611-3.0
Scrambler/De-Scrambler (100BASE-TX Only)
The purpose of the scrambler is to spread the power spectrum of the signal in order to reduce EMI and baseline wander.
The data is scrambled through the use of an 11-bit wide linear feedback shift register (LFSR). This can generate a 2047-
bit non-repetitive sequence. The receiver will then de-scramble the incoming data stream with the same sequence at the
transmitter.
100BASE-FX Operation
100BASE-FX operation is very similar to 100BASE-TX operation except that the scrambler/de-scrambler and MLT3
encoder/decoder are bypassed on transmission and reception. In this mode the auto-negotiation feature is bypassed
since there is no standard that supports fiber auto-negotiation.
100BASE-FX Signal Detection
The physical port runs in 100BASE-FX mode if FXSDx >0.6V for ports 3, 4 (KSZ8995FQ) or ports 4, 5 (KSZ8995MA)
only. This signal is internally referenced to 1.25V. The fiber module interface should be set by a voltage divider such that
FXSDx ‘H’ is above this 1.25V reference, indicating signal detect, and FXSDx ‘L’ is below the 1.25V reference to indicate
no signal. When FXSDx is below 0.6V then 100BASE-FX mode is disabled. Since there is no auto-negotiation for
100BASE-FX mode, the ports must be forced to either full or half-duplex for the fiber ports. Note that strap-in options exist
to set duplex mode for port 4, but not for port 3, 5.
100BASE-FX Far End fault
far end fault occurs when the signal detection is logically false from the receive fiber module. When this occurs, the
transmission side signals the other end of the link by sending 84 1s followed by a zero in the idle period between frames.
The far end fault may be disabled through register settings.
10BASE-T Transmit
The output 10BASE-T driver is incorporated into the 100BASE-T driver to allow transmission with the same magnetics.
They are internally wave-shaped and pre-emphasized into outputs with a typical 2.3V amplitude. The harmonic contents
are at least 27dB below the fundamental when driven by an all-ones Manchester-encoded signal.
10BASE-T Receive
On the receive side, input buffer and level detecting squelch circuits are employed. A differential input receiver circuit and
a PLL perform the decoding function. The Manchester-encoded data stream is separated into clock signal and NRZ data.
A squelch circuit rejects signals with levels less than 400mV or with short pulsewidths in order to prevent noises at the
RXP or RXM input from falsely triggering the decoder. When the input exceeds the squelch limit, the PLL locks onto the
incoming signal and the KS8995MA/FQ decodes a data frame. The receiver clock is maintained active during idle periods
in between data reception.
Power Management
The KS8995MA/FQ features a per port power down mode. To save power the user can power down ports that are not in
use by setting port control registers or MII control registers. In addition, it also supports full chip power down mode. When
activated, the entire chip will be shutdown.
MDI/MDI-X Auto Crossover
The KS8995MA/FQ supports MDI/MDI-X auto crossover. This facilitates the use of either a straight connection CAT-5
cable or a crossover CAT-5 cable. The auto-sense function will detect remote transmit and receive pairs, and correctly
assign the transmit and receive pairs from the Micrel device. This can be highly useful when end users are unaware of
cable types and can also save on an additional uplink configuration connection. The auto crossover feature may be
disabled through the port control registers.