参数资料
| 型号： | KSZ8997 |
| 厂商： | Micrel Inc |
| 文件页数： | 14/39页 |
| 文件大小： | 0K |
| 描述： | IC SWITCH 10/100 8PORT 128PQFP |
| 标准包装： | 66 |
| 系列： | * |
| 类型： | * |
| 应用： | * |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 128-BFQFP |
| 供应商设备封装： | 128-PQFP（14x20） |
| 包装： | 托盘 |
| 产品目录页面： | 1081 (CN2011-ZH PDF) |
| 其它名称： | 576-1043 |
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Micrel, Inc.
KS8997/KSZ8997
February 2007
21
M9999-022807-1.1
Station MAC Address (control frames only)
The MAC source address can be programmed as used in flow control frames. The table below briefly summarizes
this progammable feature.
Register(s)
Bit(s)
Global/Port
Description
48-53
7-0
Global
Station MAC Address: Used as source address for MAC control frames as used in
full-duplex flow control mechanisms.
Table 3. Misc. Control
EEPROM Operation
The EEPROM interface utilizes 2 pins that provide a clock and a serial data path. As part of the initialization
sequence, the KS8997 reads the contents of the EEPROM and loads the values into the appropriate registers. Note
that the first two bytes in the EEPROM must be “55” and “99” respectively for the loading to occur properly. If these
first two values are not correct, all other data will be ignored.
Data start and stop conditions are signaled on the data line as a state transition during clock high time. A high to low
transition indicates start of data and a low to high transition indicates a stop condition. The actual data that traverses
the serial line changes during the clock low time.
The KS8997 EEPROM interface is compatible with the Atmel AT24C01A part. Further timing and data sequences
can be found in the Atmel AT24C01A specification.
EEPROM Memory Map
Address
Name
Description
Default
(chip) Value
0
7-0
Signature byte 1. Value = “55”
0x55
1
7-0
Signature byte 2. Value = “99”
0x99
General Control Register
2
7-4
Reserved – set to zero
0000
2
3-2
Priority control scheme (all ports)
00 = Transmit all high priority before any low priority
01 = Transmit high and low priority at a 10:1 ratio
10 = Transmit high and low priority at a 5:1 ratio
11 = Transmit high and low priority at a 2:1 ratio
00
2
1
Priority buffer reserve for high priority traffic
1 = Reserve 6KB of buffer space for high priority
0 = None reserved
0
2
0
VLAN enforcement
1 = All Unicast frames adhere to VLAN configuration
0 = Unicast frames ignore VLAN configuration
0
Priority Classification Control – 802.1p tag field
3
7
1 = State “111” is high priority
0 = State “111” is low priority
1
3
6
1 = State “110” is high priority
0 = State “110” is low priority
1
3
5
1 = State “101” is high priority
0 = State “101” is low priority
1
3
4
1 = State “100” is high priority
0 = State “100” is low priority
1
3
1 = State “011” is high priority
0 = State “011” is low priority
0
3
2
1 = State “010” is high priority
0 = State “010” is low priority
0
3
1
1 = State “001” is high priority
0
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