参数资料
型号: KSZ9021GN TR
厂商: Micrel Inc
文件页数: 38/53页
文件大小: 0K
描述: TXRX ETHERNET GB GMII/MII 64MLF
标准包装: 1,000
类型: 收发器
驱动器/接收器数: 8/8
规程: 千兆位以太网
电源电压: 3.135 V ~ 3.465 V
安装类型: 表面贴装
封装/外壳: 64-VFQFN 裸露焊盘
供应商设备封装: 64-QFN(8x8)
包装: 带卷 (TR)
配用: 576-3873-ND - BOARD EVALUATION FOR KSZ9021GN
2009 Microchip Technology Inc.
DS22233A-page 43
MCP434X/436X
6.0
SERIAL INTERFACE (SPI)
The MCP43XX devices support the SPI serial protocol.
This SPI operates in the slave mode (does not
generate the serial clock).
The SPI interface uses up to four pins. These are:
CS - Chip Select
SCK - Serial Clock
SDI - Serial Data In
SDO - Serial Data Out
Typical SPI Interface is shown in Figure 6-1. In the SPI
interface, the Master’s Output pin is connected to the
Slave’s Input pin and the Master’s Input pin is
connected to the Slave’s Output pin.
The MCP4XXX SPI’s module supports two (of the four)
standard SPI modes. These are Mode 0,0 and 1,1.
The SPI mode is determined by the state of the SCK
pin (VIH or VIL) on the when the CS pin transitions from
inactive (VIH) to active (VIL or VIHH).
All SPI interface signals are high-voltage tolerant.
FIGURE 6-1:
Typical SPI Interface Block Diagram.
SDI
SDO
MCP4XXX
SDO
SDI
SCK
(Master Out - Slave In (MOSI))
(Master In - Slave Out (MISO))
Host
Controller
Typical SPI Interface Connections
CS
I/O
(1)
Note 1: If High voltage commands are desired, some type of external circuitry needs to be implemented.
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