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参数资料
| 型号： | L64222 |
| 厂商： | LSI CORP |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP208 |
| 封装： | PLASTIC, QFP-208 |
| 文件页数： | 7/32页 |
| 文件大小： | 248K |
| 代理商： | L64222 |
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L64222 DVD Audio/Video Decoder
15
AVALIDn
Audio Data Valid
Input
The channel device asserts this signal in response to
AREQn when the data byte it placed on the CH_DATA
bus is valid. The L64222 transfers the byte when
AVALIDn is deasserted. This signal can be used with the
DCK input for synchronous transfers.
VVALIDn
Video Data Valid
Input
The channel device asserts this signal in response to
VREQn when the data byte it placed on the CH_DATA
bus is valid. The L64222 inputs the byte when VREQn is
deasserted. This signal can be used with the DCK input
for synchronous transfers. This signal is used only in the
A/V PES stream mode when the channel input is a
program from a transport stream demultiplexer. Use the
AVALIDn signal for all data bytes in program stream
modes.
ERRORn
Bitstream Error
Input
ERRORn is asserted by the channel device to signal
uncorrectable errors in the bitstream and is used by the
L64222 to invoke error handling routines. It is latched by
the L64222 on the rising edge of AVALIDn or VVALIDn.
TOSn
Top of Sector
Input
The host asserts TOSn when the Top Of Sector is
detected by the DVD channel device. DVD packs are
stored in separate sectors on Discs. The L64222 uses
TOSn for error detection purposes. This signal is latched
by the L64222 on the rising edge of AVALIDn (VVALIDn
is not used for DVD streams).
DCK
Channel Clock
Input
The DCK is a free-running clock from the external
channel device. It must have a period
≥ 3x that of
SYSCLK (27 MHz). DCK, together with the AVALIDn and
VVALIDn signals, is used to write data synchronously to
the L64222 channel input.
Memory Interface
SCSn
SDRAM Chip Select
Output
The L64222 asserts this signal to select the low address
SDRAM chip, the rst 2 Mbytes of memory. The
recommended SDRAM size for the L64222 is:
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