参数资料
型号: L6668
厂商: STMICROELECTRONICS
元件分类: 稳压器
英文描述: 0.8 A SWITCHING CONTROLLER, 105 kHz SWITCHING FREQ-MAX, PDSO16
封装: LEAD FREE, SOP-16
文件页数: 7/23页
文件大小: 720K
代理商: L6668
15/23
L6668
Figure 39. Standby function: frequency shift vs. timing resistors (normalized quantities)
The determination of RSTBY can be done assuming that the minimum switching frequency before burst-
mode operation takes place (fmin) is specified. This value will be above the audible range to ensure a
noise-free operation. With the aid of the diagrams in figure 39, which show the relationship between the
frequency shift obtained and the ratio of RSTBY to RT for different values of the burst-mode threshold, it is
possible to determine RSTBY. Draw an horizontal line corresponding to the desired fmin/fosc ratio as long as
it intercepts the characteristic corresponding to the voltage set at the pin SKIPADJ (#9). From there, draw
a vertical line: on the horizontal axis it is possible to read the required RSTBY/RT ratio.
Note that the characteristic for V(SKIPADJ)=1.4V corresponds to the burst-mode operation not used (see
next section). Note also that, for a given V(SKIPADJ), there is both a lower limit to the RSTBY/RT ratio and
a maximum frequency shift allowed. Not observing these limits will result in erratic behavior.
In applications where the switching frequency needs not be tightly fixed for some specific reason there is
no major drawback to this technique. In case this function is not desired, the STBY pin shall be left open.
4.3 Operation at no load or very light load
When the PWM control voltage at pin COMP falls about 50 mV below a threshold externally programma-
ble via pin 9 (SKIPADJ), the IC is disabled with the MOSFET kept in OFF state and its consumption re-
duced at a very low value to minimize Vcc capacitor discharge. The soft-start capacitor is not discharged.
The control voltage now will increase as a result of the feedback reaction to the energy delivery stop, the
threshold will be exceeded and the IC will restart switching again. In this way the converter will work in
burst-mode with a constant peak current defined by the disable level applied at pin 9. A load decrease will
then cause a frequency reduction, which can go down even to few hundred hertz, thus minimizing all fre-
quency-related losses and maximizing efficiency. This kind of operation is noise-free provided the peak
current, which is user-defined by the bias voltage at pin 9, is very low.
The timing diagram of figure 40 illustrates this kind of operation along with the other ones, showing the
most significant signals.
fmin
fosc
RSTBY
RT
0.
1
10
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
V(SKIPADJ) = 1.4V
V(SKIPADJ) = 1.5V
V(SKIPADJ) = 1.6V
1.8V
2V
2.2V
2.5V
fmin
fosc
RSTBY
RT
0.
1
10
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
V(SKIPADJ) = 1.4V
V(SKIPADJ) = 1.5V
V(SKIPADJ) = 1.6V
1.8V
2V
2.2V
2.5V
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