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参数资料
| 型号： | L6713ATR |
| 厂商： | Holtek Semiconductor Inc. |
| 英文描述： | 2/3 Phase controller with embedded drivers for Intel VR10, VR11 and AMD 6 bit CPUs |
| 中文描述： | 2 / 3为英特尔VR10，VR11和AMD的嵌入式驱动器相控制器6位CPU |
| 文件页数： | 48/64页 |
| 文件大小： | 515K |
| 代理商： | L6713ATR |
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System control loop compensation
L6713A
52/64
21
System control loop compensation
The control loop is composed by the Current Sharing control loop (See Figure 9) and the
Average Current Mode control loop. Each loop gives, with a proper gain, the correction to
the PWM in order to minimize the error in its regulation: the Current Sharing control loop
equalize the currents in the inductors while the Average Current Mode control loop fixes the
output voltage equal to the reference programmed by VID. Figure 25 shows the block
diagram of the system control loop.
The system Control Loop is reported in Figure 26. The current information IDROOP sourced
by the DROOP pin flows into RFB implementing the dependence of the output voltage from
the read current.
Figure 25. Main control loop
The system can be modeled with an equivalent single phase converter which only
difference is the equivalent inductor L/N (where each phase has an L inductor).The Control
Loop gain results (obtained opening the loop after the COMP pin):
Where:
●
DCR is the Inductor parasitic resistance;
●
is the equivalent output resistance determined by the droop
function;
●
ZP(s) is the impedance resulting by the parallel of the output capacitor (and its ESR)
and the applied load RO;
●
ZF(s) is the compensation network impedance;
●
ZL(s) is the parallel of the N inductor impedance;
●
A(s) is the error amplifier gain;
●
is the PWM transfer function where
VOSC is the oscillator ramp
amplitude and has a typical value of 3V.
L3
L2
L1
PWM3
PWM2
PWM1
4 / 5
VREF
ERROR AMPLIFIER
COMP
FB
ZF(s)
ZFB(s)
DROOP
IDROOP
COUT
ROUT
1 / 5
CURRENT SHARING
DUTY CYCLE
CORRECTION
IINFO1
IINFO3
IINFO2
(PHASE2 Only applies when using 3-PHASE Operation)
G
LOOP s
()
PWM
Z
F s
()
R
DROOP
Z
P s
()
+
()
Z
P s
() Z
L s
()
+
[]
Z
F s
()
As
()
--------------
1
As
()
------------
+
R
FB
+
-------------------------------------------------------------------------------------------------------------------------
–
=
R
DROOP
DCR
Rg
-------------
R
FB
=
PWM
4
5
---
V
IN
V
OSC
-------------------
=
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| L8C202JI12 | x9 Asynchronous FIFO |
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