参数资料
型号: L6717
厂商: STMICROELECTRONICS
元件分类: 稳压器
英文描述: DUAL SWITCHING CONTROLLER, 575 kHz SWITCHING FREQ-MAX, QCC48
封装: 7 X 7 MM, 1 MM HEIGHT, ROHS COMPLIANT, VFQFPN-48
文件页数: 15/56页
文件大小: 1081K
代理商: L6717
Hybrid CPU support and CPU_TYPE detection
L6717
22/56
Doc ID 17326 Rev 1
transition for the addressed section(s) or, more in general, react to the sent command
accordingly. Refer to Figure 6, Table 8 and Table 9 for details about the set VID Command.
L6717 is able to manage individual power OFF for both the sections. The CPU may issue a
serial VID command to power OFF or power ON one Section while the other one remains
powered. In this case, the PWRGOOD signal remains asserted.
Figure 6.
SVI Communications - send byte
Table 8.
SVI send byte - address and data phase description
bits
Description
Address phase
6:4
Always 110b.
3
Not applicable, ignored.
2
Not applicable, ignored.
1
CORE section(1).
If set then the following data byte contains the VID code for CORE section.
1.
Assertion in both bit 1 and 0 will address the VID code to both CORE and NB simultaneously.
0
NB section(1).
If set then the following data byte contains the VID code for NB section.
Data phase
7
PSI_L flag (Active low).When asserted, the VR is allowed to enter power-saving
mode. See Section 5.4.3.
6:0
VID code. See Table 9.
SVC
SVD
START
110b
ACK
Slave Addressing
(7 Clocks)
654
0
WRITE
(1Ck)
ACK
(1Ck)
76
0
3
Data Phase
(8 Clocks)
ACK
(1Ck)
STOP
START
SLAVE ADDRESSING + W
ACK
DATA PHASE
ACK
STOP
BUS DRIVEN BY L6717
BUS DRIVEN BY MASTER (CPU)
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