参数资料
型号: L6732
厂商: STMICROELECTRONICS
元件分类: 稳压器
英文描述: SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO16
封装: LEAD FREE, HTSSOP-16
文件页数: 9/37页
文件大小: 898K
代理商: L6732
L6732
Device description
17/37
rises with a slope of 100 mV/s, emulating in this way the breaking of the high-side
MOSFET as an over-voltage cause.
The device realizes the over-current-protection (OCP) sensing the current both on the
high-side MOSFET(s) and the low-side MOSFET(s) and so 2 current limit thresholds can be
set (see OCH pin and OCL pin in Table 4. Pins function):
Peak current limit
Valley current limit
The peak current protection is active when the high-side MOSFET(s) is turned on, after a
masking time of about 100 ns. The valley-current-protection is enabled when the low-side
MOSFET(s) is turned on after a masking time of about 400 ns. If, when the soft-start phase
is completed, an over current event occurs during the on time (peak-current-protection) or
during the off time (valley-current-protection) the device enters in HICCUP mode: the high-
side and low-side MOSFET(s) are turned off, the soft-start capacitor is discharged with a
constant current of 10 A and when the voltage at the SS pin reaches 0.5 V the soft-start
phase restarts. During the soft-start phase the OCP provides a constant-current-protection.
If during the TON the OCH comparator triggers an over current the high-side MOSFET(s) is
immediately turned off (after the masking time and the internal delay) and returned on at the
next PWM cycle. The limit of this protection is that the TON can't be less than masking time
plus propagation delay because during the masking time the peak-current-protection is
disabled. In case of very hard short circuit, even with this short TON, the current could
escalate. The valley-current-protection is very helpful in this case to limit the current. If
during the off-time the OCL comparator triggers an over current, the high-side MOSFET(s)
is not turned on until the current is over the valley-current-limit. This implies that, if it is
necessary, some pulses of the high-side MOSFET(s) will be skipped, guaranteeing a
maximum current due to the following formula:
Figure 11.
OVP: the low-side MOSFET is turned-on in advance
VOUT
VFB
LGate
109%
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