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参数资料
| 型号： | L7250 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 运动控制电子 |
| 英文描述： | VOICE COIL MOTOR CONTROLLER, PQFP64 |
| 封装： | TQFP-64 |
| 文件页数： | 22/46页 |
| 文件大小： | 478K |
| 代理商： | L7250 |
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L7250
3.6.1 Voltage Mode
In Voltage Mode, the VCM power outputs will apply a voltage to the VCM motor commanded by the VCM DAC.
This is implemented by tristating the sense amp and error amp outputs, and connecting DAC_OUT to
ERR_OUT with an internal switch (switch S2). Skipping the err_out amplifier the DAC command will enter the
power section without any inversion, then the DAC codification must be considered in opposite direction respect
to the current mode operation.
3.7 VCM Loop Offset Calibration Mode
The VCM Loop Calibration mode can be implemented following two different approach:
1) The VCM loop is enabled (sense amp, error amp, DAC), but the VCM power stage is tri-stated. Thus,
the sense amp is guaranteed to be monitoring a zero current condition.
To implement offset calibration, the current command is swept through zero by the controller ASIC.
Since the Gm loop is open, the error amp output will be saturated in one direction or the other depending
on the current command (to configurate the error opamp as a comparator the external compensation
network will be disconnected opening the switch S1). As the command sweeps through the zero current
command point, the error amp output will swing to the other extreme. The comparator senses the out-
put swing of the error amp, and through the serial port (Reg. 00H -> b6) interrupts the ASIC. The ap-
propriate DAC value corresponding to the trip point interrupt is the loop zero current offset.
Figure 9. VCM Current Loop Offset Calibration 1
Set VCM Offset Calibration
Write Reg.03H
VCMState[2:0] = 101
START
VCM Current Loop
Offset Calibration Routine
UPDATE 15 Bit DAC
Write Reg.09H
dac[14:0]= DAC_VAL
EXIT
VCM Current Loop
Offset Calibration Routine
Select
Sense Amplifier
Gain
4.5 V/V
16 V/V
DAC_VAL = 0
Flag1 = 0 , Flag2 = 0
Set SenseAmpl.Gain
Write Reg.09H
GainSW bit = 0
Set SenseAmpl.Gain
Write Reg.09H
GainSW bit = 1
Read Error Ampl Output
Read Reg.00H
VCMcalOut bit value
VCMcalOut = 0
NO
YES
DAC_VAL = DAC_VAL +1
Flag2 =1
Flag1 = 1
DAC_VAL = DAC_VAL -1
Flag2 = 1
YES
NO
YES
NO
Store the DAC_VAL
as the zero loop offset
* DAC_VAL is in 2 complement format
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